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authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-14 17:58:15 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-14 17:58:15 -0700
commit07e492eb8921a8aa53fd2bf637bee3da94cc03fe (patch)
treef1c1c5004146cbf5ddd3a0c27c05d79627bff775 /include/dt-bindings/gpio/meson8b-gpio.h
parentb240452a0f5846280e25be7c5a507a99b382fd10 (diff)
parent1dfe0d159dc7f7b6d1734b2010aabda2bbe87d5a (diff)
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Merge tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pincontrol updates from Linus Walleij: "This is the bulk of pin control changes for the v4.1 development cycle. Nothing really exciting this time: we basically added a few new drivers and subdrivers and stabilized them in linux-next. Some cleanups too. With sunrisepoint Intel has a real fine fully featured pin control driver for contemporary hardware, and the AMD driver is also for large deployments. Most of the others are ARM devices. New drivers: - Intel Sunrisepoint - AMD KERNCZ GPIO - Broadcom Cygnus IOMUX New subdrivers: - Marvell MVEBU Armada 39x SoCs - Samsung Exynos 5433 - nVidia Tegra 210 - Mediatek MT8135 - Mediatek MT8173 - AMLogic Meson8b - Qualcomm PM8916 On top of this cleanups and development history for the above drivers as issues were fixed after merging" * tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (71 commits) pinctrl: sirf: move sgpio lock into state container pinctrl: Add support for PM8916 GPIO's and MPP's pinctrl: bcm2835: Fix support for threaded level triggered IRQs sh-pfc: r8a7790: add EtherAVB pin groups pinctrl: Document "function" + "pins" pinmux binding pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support pinctrl: fsl: imx: Check for 0 config register pinctrl: Add support for Meson8b documentation: Extend pinctrl docs for Meson8b pinctrl: Cleanup Meson8 driver Fix inconsistent spinlock of AMD GPIO driver which can be recognized by static analysis tool smatch. Declare constant Variables with Sparse's suggestion. pinctrl: at91: convert __raw to endian agnostic IO pinctrl: constify of_device_id array pinctrl: pinconf-generic: add dt node names to error messages pinctrl: pinconf-generic: scan also referenced phandle node pinctrl: mvebu: add suspend/resume support to Armada XP pinctrl driver pinctrl: st: Display pin's function when printing pinctrl debug information pinctrl: st: Show correct pin direction also in GPIO mode pinctrl: st: Supply a GPIO get_direction() call-back pinctrl: st: Move st_get_pio_control() further up the source file ...
Diffstat (limited to 'include/dt-bindings/gpio/meson8b-gpio.h')
-rw-r--r--include/dt-bindings/gpio/meson8b-gpio.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/include/dt-bindings/gpio/meson8b-gpio.h b/include/dt-bindings/gpio/meson8b-gpio.h
new file mode 100644
index 000000000000..c38cb20d7182
--- /dev/null
+++ b/include/dt-bindings/gpio/meson8b-gpio.h
@@ -0,0 +1,32 @@
+/*
+ * GPIO definitions for Amlogic Meson8b SoCs
+ *
+ * Copyright (C) 2015 Endless Mobile, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DT_BINDINGS_MESON8B_GPIO_H
+#define _DT_BINDINGS_MESON8B_GPIO_H
+
+#include <dt-bindings/gpio/meson8-gpio.h>
+
+/* GPIO Bank DIF */
+#define DIF_0_P 120
+#define DIF_0_N 121
+#define DIF_1_P 122
+#define DIF_1_N 123
+#define DIF_2_P 124
+#define DIF_2_N 125
+#define DIF_3_P 126
+#define DIF_3_N 127
+#define DIF_4_P 128
+#define DIF_4_N 129
+
+#endif /* _DT_BINDINGS_MESON8B_GPIO_H */
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