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| author | Harald Welte <laforge@gnumonks.org> | 2009-09-22 16:47:35 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-09-23 07:39:53 -0700 |
| commit | 0306ab11c396f93056009152464ff104e4721817 (patch) | |
| tree | b4b2586011d0b2669a2c02897795aacdb74d31d8 /drivers/video/via/hw.h | |
| parent | 5ff32f69e75deca5ee1a2f421ca8a3e43cfaa339 (diff) | |
| download | talos-op-linux-0306ab11c396f93056009152464ff104e4721817.tar.gz talos-op-linux-0306ab11c396f93056009152464ff104e4721817.zip | |
viafb: add support for the VX855 chipset
Add support for a new VIA integrated graphics chipset, the VX855.
Signed-off-by: HaraldWelte <HaraldWelte@viatech.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: Scott Fang <ScottFang@viatech.com.cn>
Cc: Joseph Chan <JosephChan@via.com.tw>
Cc: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/video/via/hw.h')
| -rw-r--r-- | drivers/video/via/hw.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h index 7302b403e453..4e54b2f92d0f 100644 --- a/drivers/video/via/hw.h +++ b/drivers/video/via/hw.h @@ -324,6 +324,17 @@ is reserved, so it may have problem to set 1600x1200 on IGA2. */ /* location: {CR94,0,6} */ #define VX800_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 128 +/* For VT3409 */ +#define VX855_IGA1_FIFO_MAX_DEPTH 400 +#define VX855_IGA1_FIFO_THRESHOLD 320 +#define VX855_IGA1_FIFO_HIGH_THRESHOLD 320 +#define VX855_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 160 + +#define VX855_IGA2_FIFO_MAX_DEPTH 200 +#define VX855_IGA2_FIFO_THRESHOLD 160 +#define VX855_IGA2_FIFO_HIGH_THRESHOLD 160 +#define VX855_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 320 + #define IGA1_FIFO_DEPTH_SELECT_REG_NUM 1 #define IGA1_FIFO_THRESHOLD_REG_NUM 2 #define IGA1_FIFO_HIGH_THRESHOLD_REG_NUM 2 @@ -688,6 +699,7 @@ struct pll_map { u32 cle266_pll; u32 k800_pll; u32 cx700_pll; + u32 vx855_pll; }; struct rgbLUT { @@ -832,6 +844,8 @@ struct iga2_crtc_timing { #define P4M900_FUNCTION3 0x3364 /* VT3353 chipset*/ #define VX800_FUNCTION3 0x3353 +/* VT3409 chipset*/ +#define VX855_FUNCTION3 0x3409 #define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) |
