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| author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-03-18 22:31:52 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-04-09 09:41:09 +0200 |
| commit | 499147c9dbceee27c63bf8e6b604aca1737e9e0c (patch) | |
| tree | 54305db6aac8a73a8e495f98b1f0f82886e3af53 /drivers/pinctrl/pinctrl-exynos.c | |
| parent | d5517bec272ce4732f7e86a72a1bb815834c912c (diff) | |
| download | talos-op-linux-499147c9dbceee27c63bf8e6b604aca1737e9e0c.tar.gz talos-op-linux-499147c9dbceee27c63bf8e6b604aca1737e9e0c.zip | |
pinctrl: samsung: Split pin bank description into two structures
This patch splits pin bank description into two structures, one
describing bank type (currently only bitfield widths), which can be
shared across multiple banks and second containing bank-specific
parameters including a pointer to a bank type struct.
It is a prerequisite for further patch removing the statically hardcoded
register offsets, making it impossible to support SoCs with different
set and order of pin control registers.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-exynos.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-exynos.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c index cf7700ed57b8..b5dbb87800fd 100644 --- a/drivers/pinctrl/pinctrl-exynos.c +++ b/drivers/pinctrl/pinctrl-exynos.c @@ -34,6 +34,15 @@ #include "pinctrl-samsung.h" #include "pinctrl-exynos.h" + +static struct samsung_pin_bank_type bank_type_off = { + .fld_width = { 4, 1, 2, 2, 2, 2, }, +}; + +static struct samsung_pin_bank_type bank_type_alive = { + .fld_width = { 4, 1, 2, 2, }, +}; + /* list of external wakeup controllers supported */ static const struct of_device_id exynos_wkup_irq_ids[] = { { .compatible = "samsung,exynos4210-wakeup-eint", }, @@ -76,6 +85,7 @@ static void exynos_gpio_irq_ack(struct irq_data *irqd) static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) { struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); + struct samsung_pin_bank_type *bank_type = bank->type; struct samsung_pinctrl_drv_data *d = bank->drvdata; struct samsung_pin_ctrl *ctrl = d->ctrl; unsigned int pin = irqd->hwirq; @@ -117,8 +127,8 @@ static int exynos_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) writel(con, d->virt_base + reg_con); reg_con = bank->pctl_offset; - shift = pin * bank->func_width; - mask = (1 << bank->func_width) - 1; + shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; + mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; spin_lock_irqsave(&bank->slock, flags); @@ -259,6 +269,7 @@ static void exynos_wkup_irq_ack(struct irq_data *irqd) static int exynos_wkup_irq_set_type(struct irq_data *irqd, unsigned int type) { struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); + struct samsung_pin_bank_type *bank_type = bank->type; struct samsung_pinctrl_drv_data *d = bank->drvdata; unsigned int pin = irqd->hwirq; unsigned long reg_con = d->ctrl->weint_con + bank->eint_offset; @@ -299,8 +310,8 @@ static int exynos_wkup_irq_set_type(struct irq_data *irqd, unsigned int type) writel(con, d->virt_base + reg_con); reg_con = bank->pctl_offset; - shift = pin * bank->func_width; - mask = (1 << bank->func_width) - 1; + shift = pin * bank_type->fld_width[PINCFG_TYPE_FUNC]; + mask = (1 << bank_type->fld_width[PINCFG_TYPE_FUNC]) - 1; spin_lock_irqsave(&bank->slock, flags); |
