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authorBen Hutchings <bhutchings@solarflare.com>2008-11-04 20:34:28 +0000
committerJeff Garzik <jgarzik@redhat.com>2008-11-06 00:49:57 -0500
commitf41507245ef8b079685aba8da5b5b2b5e87e70bc (patch)
treebe8c8aee6a6fc3c69d946dcd3fe24306bf89775e /drivers/net/sfc/spi.h
parent0a95f56323ce93dac354c1b2d54bf959a985cf7d (diff)
downloadtalos-op-linux-f41507245ef8b079685aba8da5b5b2b5e87e70bc.tar.gz
talos-op-linux-f41507245ef8b079685aba8da5b5b2b5e87e70bc.zip
sfc: Expose flash region storing boot code as MTD
The boot code that appears as a PCI expansion ROM on the SFC4000 is stored in flash. Expose this as a standard MTD device to allow for in-place upgrades. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/sfc/spi.h')
-rw-r--r--drivers/net/sfc/spi.h17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/net/sfc/spi.h b/drivers/net/sfc/spi.h
index b73f86cf5fa2..c4aca132348a 100644
--- a/drivers/net/sfc/spi.h
+++ b/drivers/net/sfc/spi.h
@@ -25,6 +25,7 @@
#define SPI_WRDI 0x04 /* Reset write enable latch */
#define SPI_RDSR 0x05 /* Read status register */
#define SPI_WREN 0x06 /* Set write enable latch */
+#define SPI_SST_EWSR 0x50 /* SST: Enable write to status register */
#define SPI_STATUS_WPEN 0x80 /* Write-protect pin enabled */
#define SPI_STATUS_BP2 0x10 /* Block protection bit 2 */
@@ -36,6 +37,7 @@
/**
* struct efx_spi_device - an Efx SPI (Serial Peripheral Interface) device
* @efx: The Efx controller that owns this device
+ * @mtd: MTD state
* @device_id: Controller's id for the device
* @size: Size (in bytes)
* @addr_len: Number of address bytes in read/write commands
@@ -44,20 +46,30 @@
* use bit 3 of the command byte as address bit A8, rather
* than having a two-byte address. If this flag is set, then
* commands should be munged in this way.
+ * @erase_command: Erase command (or 0 if sector erase not needed).
+ * @erase_size: Erase sector size (in bytes)
+ * Erase commands affect sectors with this size and alignment.
+ * This must be a power of two.
* @block_size: Write block size (in bytes).
* Write commands are limited to blocks with this size and alignment.
- * @read: Read function for the device
- * @write: Write function for the device
*/
struct efx_spi_device {
struct efx_nic *efx;
+#ifdef CONFIG_SFC_MTD
+ void *mtd;
+#endif
int device_id;
unsigned int size;
unsigned int addr_len;
unsigned int munge_address:1;
+ u8 erase_command;
+ unsigned int erase_size;
unsigned int block_size;
};
+int falcon_spi_cmd(const struct efx_spi_device *spi, unsigned int command,
+ int address, const void* in, void *out, unsigned int len);
+int falcon_spi_fast_wait(const struct efx_spi_device *spi);
int falcon_spi_read(const struct efx_spi_device *spi, loff_t start,
size_t len, size_t *retlen, u8 *buffer);
int falcon_spi_write(const struct efx_spi_device *spi, loff_t start,
@@ -77,6 +89,7 @@ int falcon_spi_write(const struct efx_spi_device *spi, loff_t start,
* be absent or truncated depending on the devices used.
*/
#define FALCON_NVCONFIG_END 0x400U
+#define FALCON_FLASH_BOOTCODE_START 0x8000U
#define EFX_EEPROM_BOOTCONFIG_START 0x800U
#define EFX_EEPROM_BOOTCONFIG_END 0x1800U
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