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authorGiuseppe CAVALLARO <peppe.cavallaro@st.com>2012-04-18 19:48:21 +0000
committerDavid S. Miller <davem@davemloft.net>2012-04-19 20:08:59 -0400
commit0f1f88a875bd6c6725501183fabeb99a70c35757 (patch)
tree9ac6a5af22c32206d0e23320f497f4e04fb41d7e /drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
parent4bfcbd7abce2d9b56f10d455ffeab00584cd8045 (diff)
downloadtalos-op-linux-0f1f88a875bd6c6725501183fabeb99a70c35757.tar.gz
talos-op-linux-0f1f88a875bd6c6725501183fabeb99a70c35757.zip
stmmac: verify the dma_cfg platform fields
Recently the dma parameters that can be passed from the platform have been moved from the plat_stmmacenet_data to the stmmac_dma_cfg. In case of this new structure is not well allocated the driver can fails. This is an example how this field is managed in ST platforms static struct stmmac_dma_cfg gmac_dma_setting = { .pbl = 32, }; static struct plat_stmmacenet_data stih415_ethernet_platform_data[] = { { .dma_cfg = &gmac_dma_setting, .has_gmac = 1, [snip] This patch so verifies that the dma_cfg passed from the platform. In case of it is NULL there is no reason that the driver has to fail and some default values can be passed. These are ok for all the Synopsys chips and could impact on performances, only. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> cc: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
index 65e0f98520d6..58fab5303e9c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c
@@ -28,6 +28,7 @@
struct plat_stmmacenet_data plat_dat;
struct stmmac_mdio_bus_data mdio_data;
+struct stmmac_dma_cfg dma_cfg;
static void stmmac_default_data(void)
{
@@ -35,8 +36,6 @@ static void stmmac_default_data(void)
plat_dat.bus_id = 1;
plat_dat.phy_addr = 0;
plat_dat.interface = PHY_INTERFACE_MODE_GMII;
- plat_dat.dma_cfg->pbl = 32;
- plat_dat.dma_cfg->burst_len = DMA_AXI_BLEN_256;
plat_dat.clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
plat_dat.has_gmac = 1;
plat_dat.force_sf_dma_mode = 1;
@@ -45,6 +44,10 @@ static void stmmac_default_data(void)
mdio_data.phy_reset = NULL;
mdio_data.phy_mask = 0;
plat_dat.mdio_bus_data = &mdio_data;
+
+ dma_cfg.pbl = 32;
+ dma_cfg.burst_len = DMA_AXI_BLEN_256;
+ plat_dat.dma_cfg = &dma_cfg;
}
/**
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