diff options
| author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2016-05-09 13:22:51 -0400 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-05-09 14:26:11 -0400 |
| commit | 119477bd987cbaf29af10b9cb1b731547906787e (patch) | |
| tree | 5ca065fa67928bfb62ddb6b81c88c620b618161a /drivers/net/dsa/mv88e6xxx.c | |
| parent | 08a012619a0349b8e02797bdfe57051fe7df3d3b (diff) | |
| download | talos-op-linux-119477bd987cbaf29af10b9cb1b731547906787e.tar.gz talos-op-linux-119477bd987cbaf29af10b9cb1b731547906787e.zip | |
net: dsa: mv88e6xxx: factorize GLOBAL_CONTROL setup
All switch models configure the GLOBAL_CONTROL register with slightly
differences.
Discarding packets with excessive collisions
(GLOBAL_CONTROL_DISCARD_EXCESS) is specific to 6352 and similar
switches, and setting a maximum frame size
(GLOBAL_CONTROL_MAX_FRAME_1632) is specific to 6185 and similar
switches.
As we are centralizing the chips setup, skip these settings and don't
discard any frames yet, until we found out that such discarding by the
hardware is necessary.
Assume a common setup to enable the PHY Polling Unit if present, don't
discard any packets, and mask all interrupt sources.
Tested on 88E6352 and 88E6185.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa/mv88e6xxx.c')
| -rw-r--r-- | drivers/net/dsa/mv88e6xxx.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/dsa/mv88e6xxx.c b/drivers/net/dsa/mv88e6xxx.c index 32b36a8fb446..f1cd66073bf7 100644 --- a/drivers/net/dsa/mv88e6xxx.c +++ b/drivers/net/dsa/mv88e6xxx.c @@ -2922,9 +2922,22 @@ int mv88e6xxx_setup_ports(struct dsa_switch *ds) static int mv88e6xxx_setup_global(struct mv88e6xxx_priv_state *ps) { + u16 reg; int err; int i; + /* Enable the PHY Polling Unit if present, don't discard any packets, + * and mask all interrupt sources. + */ + reg = 0; + if (mv88e6xxx_has(ps, MV88E6XXX_FLAG_PPU) || + mv88e6xxx_has(ps, MV88E6XXX_FLAG_PPU_ACTIVE)) + reg |= GLOBAL_CONTROL_PPU_ENABLE; + + err = _mv88e6xxx_reg_write(ps, REG_GLOBAL, GLOBAL_CONTROL, reg); + if (err) + return err; + /* Set the default address aging time to 5 minutes, and * enable address learn messages to be sent to all message * ports. |
