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author | Daniel Lezcano <daniel.lezcano@linaro.org> | 2012-02-20 12:30:26 +0100 |
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committer | Samuel Ortiz <sameo@linux.intel.com> | 2012-03-06 18:46:47 +0100 |
commit | 485540dce01cf4b4d3629141399678e35e66b711 (patch) | |
tree | 5da48a9769a813d8e489abe49bdee275f2ac9b6d /drivers/mfd/db8500-prcmu.c | |
parent | 8dfc4705828178ae25f08ce774831e4c19de8e51 (diff) | |
download | talos-op-linux-485540dce01cf4b4d3629141399678e35e66b711.tar.gz talos-op-linux-485540dce01cf4b4d3629141399678e35e66b711.zip |
mfd: Decouple/recouple gic from the ux500 PRCMU
This patch allows to decouple and recouple the gic from the PRCMU.
This is needed to put the A9 core in retention mode with the cpuidle
driver.
It is based on top of the "DB8500 PRCMU update" patchset.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rickard Andersson <rickard.andersson@stericsson.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/db8500-prcmu.c')
-rw-r--r-- | drivers/mfd/db8500-prcmu.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index 128b5f4a4fb0..b320cc602668 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -821,6 +821,38 @@ u8 db8500_prcmu_get_power_state_result(void) return readb(tcdm_base + PRCM_ACK_MB0_AP_PWRSTTR_STATUS); } +#define PRCMU_A9_MASK_REQ 0x00000328 +#define PRCMU_A9_MASK_REQ_MASK 0x00000001 +#define PRCMU_GIC_DELAY 1 + +/* This function decouple the gic from the prcmu */ +int db8500_prcmu_gic_decouple(void) +{ + u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Set bit 0 register value to 1 */ + writel(val | PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Make sure the register is updated */ + readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Wait a few cycles for the gic mask completion */ + udelay(PRCMU_GIC_DELAY); + + return 0; +} + +/* This function recouple the gic with the prcmu */ +int db8500_prcmu_gic_recouple(void) +{ + u32 val = readl(_PRCMU_BASE + PRCMU_A9_MASK_REQ); + + /* Set bit 0 register value to 0 */ + writel(val & ~PRCMU_A9_MASK_REQ_MASK, _PRCMU_BASE + PRCMU_A9_MASK_REQ); + + return 0; +} + /* This function should only be called while mb0_transfer.lock is held. */ static void config_wakeups(void) { |