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authorGrygorii Strashko <grygorii.strashko@ti.com>2014-07-23 17:40:30 +0300
committerJason Cooper <jason@lakedaemon.net>2014-08-17 19:13:23 +0000
commit89323f8c504a8653c66fe4a314723b36b07e29e1 (patch)
tree57c0e382912754cfba1e95c715a54332014c3f5e /drivers/irqchip/Kconfig
parent7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9 (diff)
downloadtalos-op-linux-89323f8c504a8653c66fe4a314723b36b07e29e1.tar.gz
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irqchip: keystone: Add irq controller ip driver
On Keystone SOCs, DSP cores can send interrupts to ARM host using the IRQ controller IP. It provides 28 IRQ signals to ARM. The IRQ handler running on HOST OS can identify DSP signal source by analyzing SRCCx bits in IPCARx registers. This is one of the component used by the IPC mechanism used on Keystone SOCs. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Link: https://lkml.kernel.org/r/1406126430-9978-1-git-send-email-grygorii.strashko@ti.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip/Kconfig')
-rw-r--r--drivers/irqchip/Kconfig7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
index b8632bf9a7f3..c88896478e70 100644
--- a/drivers/irqchip/Kconfig
+++ b/drivers/irqchip/Kconfig
@@ -113,3 +113,10 @@ config IRQ_CROSSBAR
The primary irqchip invokes the crossbar's callback which inturn allocates
a free irq and configures the IP. Thus the peripheral interrupts are
routed to one of the free irqchip interrupt lines.
+
+config KEYSTONE_IRQ
+ tristate "Keystone 2 IRQ controller IP"
+ depends on ARCH_KEYSTONE
+ help
+ Support for Texas Instruments Keystone 2 IRQ controller IP which
+ is part of the Keystone 2 IPC mechanism
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