diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2018-02-16 15:47:26 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-02-16 15:47:26 +0100 |
| commit | 6dee6ae9d62642e81def4d461d71f13a6496ab59 (patch) | |
| tree | 6c75d416c427a59f190e197ad83fe59b7bebf656 /drivers/gpu/drm/sun4i/sun8i_ui_scaler.h | |
| parent | 1beaeacdc88b537703d04d5536235d0bbb36db93 (diff) | |
| parent | 0b24a0bbe2147815d982d9335c41bb10c04f40bc (diff) | |
| download | talos-op-linux-6dee6ae9d62642e81def4d461d71f13a6496ab59.tar.gz talos-op-linux-6dee6ae9d62642e81def4d461d71f13a6496ab59.zip | |
Merge tag 'irqchip-4.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip updates for 4.16-rc2 from Marc Zyngier
- A MIPS GIC fix for spurious, masked interrupts
- A fix for a subtle IPI bug in GICv3
- Do not probe GICv3 ITSs that are marked as disabled
- Multi-MSI support for GICv2m
- Various cleanups
Diffstat (limited to 'drivers/gpu/drm/sun4i/sun8i_ui_scaler.h')
| -rw-r--r-- | drivers/gpu/drm/sun4i/sun8i_ui_scaler.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h new file mode 100644 index 000000000000..86295be8be78 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef _SUN8I_UI_SCALER_H_ +#define _SUN8I_UI_SCALER_H_ + +#include "sun8i_mixer.h" + +/* this two macros assumes 16 fractional bits which is standard in DRM */ +#define SUN8I_UI_SCALER_SCALE_MIN 1 +#define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1) + +#define SUN8I_UI_SCALER_SCALE_FRAC 20 +#define SUN8I_UI_SCALER_PHASE_FRAC 20 +#define SUN8I_UI_SCALER_COEFF_COUNT 16 +#define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) + +#define SUN8I_SCALER_GSU_CTRL(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x0) +#define SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x40) +#define SUN8I_SCALER_GSU_INSIZE(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x80) +#define SUN8I_SCALER_GSU_HSTEP(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x88) +#define SUN8I_SCALER_GSU_VSTEP(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x8c) +#define SUN8I_SCALER_GSU_HPHASE(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x90) +#define SUN8I_SCALER_GSU_VPHASE(vi_cnt, ui_idx) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x98) +#define SUN8I_SCALER_GSU_HCOEFF(vi_cnt, ui_idx, index) \ + (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x200 + \ + 0x4 * (index)) + +#define SUN8I_SCALER_GSU_CTRL_EN BIT(0) +#define SUN8I_SCALER_GSU_CTRL_COEFF_RDY BIT(4) + +void sun8i_ui_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable); +void sun8i_ui_scaler_setup(struct sun8i_mixer *mixer, int layer, + u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, + u32 hscale, u32 vscale, u32 hphase, u32 vphase); + +#endif |
