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author | Alex Deucher <alexander.deucher@amd.com> | 2016-09-27 14:51:53 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2016-09-28 16:13:16 -0400 |
commit | 427920292b00474d978d632bc03a8e4e50029af3 (patch) | |
tree | 19cf9e8e4d43a4c4c7d4fdfa67d01ee61a59025a /drivers/gpu/drm/radeon/si_dpm.c | |
parent | 9909a7956f4c633a1fb98bf9f1ea32a67b12fe87 (diff) | |
download | talos-op-linux-427920292b00474d978d632bc03a8e4e50029af3.tar.gz talos-op-linux-427920292b00474d978d632bc03a8e4e50029af3.zip |
drm/radeon/si/dpm: fix phase shedding setup
Used the wrong index to setup the phase shedding mask.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/si_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index e6abc09b67e3..ba7e3d19b38d 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -4106,7 +4106,7 @@ static int si_populate_smc_voltage_tables(struct radeon_device *rdev, &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table); - table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] = + table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] = cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low); si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay, |