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authorAlex Deucher <alexander.deucher@amd.com>2013-12-18 14:07:14 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-12-24 17:57:06 -0500
commit6c7bccea390853bdec5b76fe31fc50f3b36f75d5 (patch)
tree2b6002db2816965b8d2850728b81ff0099b036a9 /drivers/gpu/drm/radeon/r520.c
parente14cd2bbcb98541e199b7223f38d61527dfe45c9 (diff)
downloadtalos-op-linux-6c7bccea390853bdec5b76fe31fc50f3b36f75d5.tar.gz
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drm/radeon/pm: move pm handling into the asic specific code
We need more control over the ordering of dpm init with respect to the rest of the asic. Specifically, the SMC has to be initialized before the rlc and cg/pg. The pm code currently initializes late in the driver, but we need it to happen much earlier so move pm handling into the asic specific callbacks. This makes dpm more reliable and makes clockgating work properly on CIK parts and should help on SI parts as well. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/r520.c')
-rw-r--r--drivers/gpu/drm/radeon/r520.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index e1aece73b370..e209eb75024f 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -240,6 +240,8 @@ int r520_resume(struct radeon_device *rdev)
/* Initialize surface registers */
radeon_surface_init(rdev);
+ radeon_pm_resume(rdev);
+
rdev->accel_working = true;
r = r520_startup(rdev);
if (r) {
@@ -312,6 +314,9 @@ int r520_init(struct radeon_device *rdev)
return r;
rv515_set_safe_registers(rdev);
+ /* Initialize power management */
+ radeon_pm_init(rdev);
+
rdev->accel_working = true;
r = r520_startup(rdev);
if (r) {
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