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authorPaul Kocialkowski <paul.kocialkowski@bootlin.com>2018-07-17 14:25:22 +0200
committerMaxime Ripard <maxime.ripard@bootlin.com>2018-07-17 17:30:59 +0200
commitd8b3f454dab48bc40528aa5f19f7f27f2a6dc825 (patch)
tree25e67b0fd7295b747ba0180afee078c54f841d4e /drivers/gpu/drm/pl111
parent4c2ae34f64c80991501ebd830b13dce5c7dc3621 (diff)
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drm/sun4i: sun8i: Avoid clearing blending order at each atomic commit
Blending order is set based on the z position of each DRM plane. The blending order register is currently cleared at each atomic DRM commit, with the intent that each committed plane will set the appropriate bits (based on its z-pos) when enabling the plane. However, it sometimes happens that a particular plane is left unchanged by an atomic commit and thus will not be configured again. In that scenario, blending order is cleared and only the bits relevant for the planes affected by the commit are set. This leaves the planes that did not change without their blending order set in the register, leading to that plane not being displayed. Instead of clearing the blending order register at every atomic commit, this change moves the register's initial clear at bind time and only clears the bits for a specific plane when disabling it or changing its zpos. This way, planes that are left untouched by a DRM atomic commit are no longer disabled. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180717122522.11327-1-paul.kocialkowski@bootlin.com
Diffstat (limited to 'drivers/gpu/drm/pl111')
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