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authorTomi Valkeinen <tomi.valkeinen@ti.com>2017-08-23 12:19:02 +0300
committerTomi Valkeinen <tomi.valkeinen@ti.com>2017-08-23 12:22:12 +0300
commitfc5cc9678e130196012c17b37e555d53d3d3476b (patch)
tree30e63d00c084397b66502dc63232cf30de73f765 /drivers/gpu/drm/omapdrm
parent0c43f1e02598d304d4cfb06187305445c8207675 (diff)
downloadtalos-op-linux-fc5cc9678e130196012c17b37e555d53d3d3476b.tar.gz
talos-op-linux-fc5cc9678e130196012c17b37e555d53d3d3476b.zip
drm/omap: work-around for omap3 display enable
Seems that on omap3 enabling a crtc without any planes causes a sync lost flood. This only happens on the first enable, and after that it works. This looks like an HW issue and it's unclear why this is happening or how to fix it. This started happening after 897145d0c7010b4e07fa9bc674b1dfb9a2c6fff9 ("drm/omapdrm: Move commit_modeset_enables() before commit_planes()") which, as a work-around, changed omapdrm first to do the modeset enable, and plane set only after that. This WA should be fine on all DSS versions, but apparently OMAP3 DSS is an exception. This patch reverts that work-around for OMAP3 DSS. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/gpu/drm/omapdrm')
-rw-r--r--drivers/gpu/drm/omapdrm/omap_drv.c47
1 files changed, 30 insertions, 17 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
index 9b3c36b48356..cdf5b0601eba 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -84,23 +84,36 @@ static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
/* Apply the atomic update. */
drm_atomic_helper_commit_modeset_disables(dev, old_state);
- /* With the current dss dispc implementation we have to enable
- * the new modeset before we can commit planes. The dispc ovl
- * configuration relies on the video mode configuration been
- * written into the HW when the ovl configuration is
- * calculated.
- *
- * This approach is not ideal because after a mode change the
- * plane update is executed only after the first vblank
- * interrupt. The dispc implementation should be fixed so that
- * it is able use uncommitted drm state information.
- */
- drm_atomic_helper_commit_modeset_enables(dev, old_state);
- omap_atomic_wait_for_completion(dev, old_state);
-
- drm_atomic_helper_commit_planes(dev, old_state, 0);
-
- drm_atomic_helper_commit_hw_done(old_state);
+ if (priv->omaprev != 0x3430) {
+ /* With the current dss dispc implementation we have to enable
+ * the new modeset before we can commit planes. The dispc ovl
+ * configuration relies on the video mode configuration been
+ * written into the HW when the ovl configuration is
+ * calculated.
+ *
+ * This approach is not ideal because after a mode change the
+ * plane update is executed only after the first vblank
+ * interrupt. The dispc implementation should be fixed so that
+ * it is able use uncommitted drm state information.
+ */
+ drm_atomic_helper_commit_modeset_enables(dev, old_state);
+ omap_atomic_wait_for_completion(dev, old_state);
+
+ drm_atomic_helper_commit_planes(dev, old_state, 0);
+
+ drm_atomic_helper_commit_hw_done(old_state);
+ } else {
+ /*
+ * OMAP3 DSS seems to have issues with the work-around above,
+ * resulting in endless sync losts if a crtc is enabled without
+ * a plane. For now, skip the WA for OMAP3.
+ */
+ drm_atomic_helper_commit_planes(dev, old_state, 0);
+
+ drm_atomic_helper_commit_modeset_enables(dev, old_state);
+
+ drm_atomic_helper_commit_hw_done(old_state);
+ }
/*
* Wait for completion of the page flips to ensure that old buffers
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