diff options
| author | Dave Airlie <airlied@redhat.com> | 2009-12-23 10:28:24 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-12-23 10:28:24 +1000 |
| commit | 44f9e6c6bc508b202755d9e9e48a8ba96a5f0fa4 (patch) | |
| tree | fe99d4f4e367be40923a47d40ef772d680ac8db9 /drivers/gpu/drm/nouveau/nv50_graph.c | |
| parent | 29ebdf925c2c45f6531a953c6c5c8e4d3b4ac2dc (diff) | |
| parent | 37cb3e08852be92d94e6a65c489bd8afa2e8a15f (diff) | |
| download | talos-op-linux-44f9e6c6bc508b202755d9e9e48a8ba96a5f0fa4.tar.gz talos-op-linux-44f9e6c6bc508b202755d9e9e48a8ba96a5f0fa4.zip | |
Merge remote branch 'nouveau/for-airlied' into drm-linus
* nouveau/for-airlied:
drm/nouveau: fix bug causing pinned buffers to lose their NO_EVICT flag
drm/nv50: fix suspend/resume delays without firmware present
drm/nouveau: prevent all channel creation if accel not available
drm/nv50: fix two potential suspend/resume oopses
drm/nv40: implement ctxprog/state generation
drm/nv10: Add the initial graph context and soft methods needed for LMA.
drm/nouveau: Fix up buffer eviction, and evict them to GART, if possible.
drm/nouveau: Add proper error handling to nouveau_card_init
drm/nv04: Fix NV04 set_operation software method.
drm/nouveau: Kill global state in BIOS script interpreter
drm/nouveau: Kill global state in NvShadowBIOS
drm/nouveau: use drm debug levels
drm/i2c/ch7006: Fix load detection false positives right after system init.
drm/nv04-nv40: Fix "conflicting memory types" when saving/restoring VGA fonts.
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_graph.c')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv50_graph.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c index 177d8229336f..ca79f32be44c 100644 --- a/drivers/gpu/drm/nouveau/nv50_graph.c +++ b/drivers/gpu/drm/nouveau/nv50_graph.c @@ -107,9 +107,13 @@ nv50_graph_init_regs(struct drm_device *dev) static int nv50_graph_init_ctxctl(struct drm_device *dev) { + struct drm_nouveau_private *dev_priv = dev->dev_private; + NV_DEBUG(dev, "\n"); - nv40_grctx_init(dev); + nouveau_grctx_prog_load(dev); + if (!dev_priv->engine.graph.ctxprog) + dev_priv->engine.graph.accel_blocked = true; nv_wr32(dev, 0x400320, 4); nv_wr32(dev, NV40_PGRAPH_CTXCTL_CUR, 0); @@ -140,7 +144,7 @@ void nv50_graph_takedown(struct drm_device *dev) { NV_DEBUG(dev, "\n"); - nv40_grctx_fini(dev); + nouveau_grctx_fini(dev); } void @@ -207,7 +211,7 @@ nv50_graph_create_context(struct nouveau_channel *chan) dev_priv->engine.instmem.finish_access(dev); dev_priv->engine.instmem.prepare_access(dev, true); - nv40_grctx_vals_load(dev, ctx); + nouveau_grctx_vals_load(dev, ctx); nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12); if ((dev_priv->chipset & 0xf0) == 0xa0) nv_wo32(dev, ctx, 0x00004/4, 0x00000000); |
