diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-16 15:48:00 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-16 15:48:00 -0800 |
commit | 796e1c55717e9a6ff5c81b12289ffa1ffd919b6f (patch) | |
tree | 27ce45cb1227156b72c641dbcbf2b399d23ba63d /drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h | |
parent | 8c334ce8f0fec7122fc3059c52a697b669a01b41 (diff) | |
parent | 45ee2dbc65cbf6910892c480e6f428be342fa733 (diff) | |
download | talos-op-linux-796e1c55717e9a6ff5c81b12289ffa1ffd919b6f.tar.gz talos-op-linux-796e1c55717e9a6ff5c81b12289ffa1ffd919b6f.zip |
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie:
"This is the main drm pull, it has a shared branch with some alsa
crossover but everything should be acked by relevant people.
New drivers:
- ATMEL HLCDC driver
- designware HDMI core support (used in multiple SoCs).
core:
- lots more atomic modesetting work, properties and atomic ioctl
(hidden under option)
- bridge rework allows support for Samsung exynos chromebooks to
work finally.
- some more panels supported
i915:
- atomic plane update support
- DSI uses shared DSI infrastructure
- Skylake basic support is all merged now
- component framework used for i915/snd-hda interactions
- write-combine cpu memory mappings
- engine init code refactored
- full ppgtt enabled where execlists are enabled.
- cherryview rps/gpu turbo and pipe CRC support.
radeon:
- indirect draw support for evergreen/cayman
- SMC and manual fan control for SI/CI
- Displayport audio support
amdkfd:
- SDMA usermode queue support
- replace suballocator usage with more suitable one
- rework for allowing interfacing to more than radeon
nouveau:
- major renaming in prep for later splitting work
- merge arm platform driver into nouveau
- GK20A reclocking support
msm:
- conversion to atomic modesetting
- YUV support for mdp4/5
- eDP support
- hw cursor for mdp5
tegra:
- conversion to atomic modesetting
- better suspend/resume support for child devices
rcar-du:
- interlaced support
imx:
- move to using dw_hdmi shared support
- mode_fixup support
sti:
- DVO support
- HDMI infoframe support
exynos:
- refactoring and cleanup, removed lots of internal unnecessary
abstraction
- exynos7 DECON display controller support
Along with the usual bunch of fixes, cleanups etc"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (724 commits)
drm/radeon: fix voltage setup on hawaii
drm/radeon/dp: Set EDP_CONFIGURATION_SET for bridge chips if necessary
drm/radeon: only enable kv/kb dpm interrupts once v3
drm/radeon: workaround for CP HW bug on CIK
drm/radeon: Don't try to enable write-combining without PAT
drm/radeon: use 0-255 rather than 0-100 for pwm fan range
drm/i915: Clamp efficient frequency to valid range
drm/i915: Really ignore long HPD pulses on eDP
drm/exynos: Add DECON driver
drm/i915: Correct the base value while updating LP_OUTPUT_HOLD in MIPI_PORT_CTRL
drm/i915: Insert a command barrier on BLT/BSD cache flushes
drm/i915: Drop vblank wait from intel_dp_link_down
drm/exynos: fix NULL pointer reference
drm/exynos: remove exynos_plane_dpms
drm/exynos: remove mode property of exynos crtc
drm/exynos: Remove exynos_plane_dpms() call with no effect
drm/i915: Squelch overzealous uncore reset WARN_ON
drm/i915: Take runtime pm reference on hangcheck_info
drm/i915: Correct the IOSF Dev_FN field for IOSF transfers
drm/exynos: fix DMA_ATTR_NO_KERNEL_MAPPING usage
...
Diffstat (limited to 'drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h new file mode 100644 index 000000000000..7b86acc634a0 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/pmu.h @@ -0,0 +1,53 @@ +#ifndef __NVKM_PMU_H__ +#define __NVKM_PMU_H__ +#include <core/subdev.h> + +struct nvkm_pmu { + struct nvkm_subdev base; + + struct { + u32 base; + u32 size; + } send; + + struct { + u32 base; + u32 size; + + struct work_struct work; + wait_queue_head_t wait; + u32 process; + u32 message; + u32 data[2]; + } recv; + + int (*message)(struct nvkm_pmu *, u32[2], u32, u32, u32, u32); + void (*pgob)(struct nvkm_pmu *, bool); +}; + +static inline struct nvkm_pmu * +nvkm_pmu(void *obj) +{ + return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_PMU); +} + +extern struct nvkm_oclass *gt215_pmu_oclass; +extern struct nvkm_oclass *gf100_pmu_oclass; +extern struct nvkm_oclass *gf110_pmu_oclass; +extern struct nvkm_oclass *gk104_pmu_oclass; +extern struct nvkm_oclass *gk208_pmu_oclass; +extern struct nvkm_oclass *gk20a_pmu_oclass; + +/* interface to MEMX process running on PMU */ +struct nvkm_memx; +int nvkm_memx_init(struct nvkm_pmu *, struct nvkm_memx **); +int nvkm_memx_fini(struct nvkm_memx **, bool exec); +void nvkm_memx_wr32(struct nvkm_memx *, u32 addr, u32 data); +void nvkm_memx_wait(struct nvkm_memx *, u32 addr, u32 mask, u32 data, u32 nsec); +void nvkm_memx_nsec(struct nvkm_memx *, u32 nsec); +void nvkm_memx_wait_vblank(struct nvkm_memx *); +void nvkm_memx_train(struct nvkm_memx *); +int nvkm_memx_train_result(struct nvkm_pmu *, u32 *, int); +void nvkm_memx_block(struct nvkm_memx *); +void nvkm_memx_unblock(struct nvkm_memx *); +#endif |