Merge tag 'drm-msm-next-2018-03-20' of git://people.freedesktop.org/~robclark/linux into drm-next

Updates for 4.17.  Sorry, running a bit late on this, didn't have a
chance to send pull-req before heading to linaro.  But it has all been
in linux-next for a while.  Main updates:

 + DSI updates from 10nm / SDM845
 + fix for race condition with a3xx/a4xx fence completion irq
 + some refactoring/prep work for eventual a6xx support (ie. when we have
   a userspace)
 + a5xx debugfs enhancements
 + some mdp5 fixes/cleanups to prepare for eventually merging writeback
   support (ie. when we have a userspace)

* tag 'drm-msm-next-2018-03-20' of git://people.freedesktop.org/~robclark/linux: (36 commits)
  drm/msm: fix building without debugfs
  drm/msm/mdp5: don't pre-reserve LM's if no dual-dsi
  drm/msm/mdp5: add missing LM flush bits
  drm/msm/mdp5: print a bit more of the atomic state
  drm/msm/mdp5: rework CTL START signal handling
  drm/msm: Trigger fence completion from GPU
  drm/msm/dsi: fix direct caller of msm_gem_free_object()
  drm/msm: strip out msm_fence_cb
  drm/msm: rename mdp->disp
  drm/msm/dsi: Fix potential NULL pointer dereference in msm_dsi_modeset_init
  drm/msm/adreno/a5xx_debugfs: fix potential NULL pointer dereference
  drm/msm/dsi: Get byte_intf_clk only for versions that need it
  drm/msm/adreno: Use generic function to load firmware to a buffer object
  drm/msm/adreno: Define a list of firmware files to load per target
  drm/msm/adreno: Rename gpmufw to powerfw
  drm/msm: Pass the correct aperture end to drm_mm_init
  drm/msm/gpu: Set number of clocks to 0 if the list allocation fails
  drm/msm: Replace gem_object deprecated functions
  drm/msm/hdmi: fix semicolon.cocci warnings
  drm/msm/mdp5: Fix trailing semicolon
  ...

1 files changed, 19 insertions, 0 deletions

diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 65c1dfbbe019..0327bb54b01b 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -118,6 +118,24 @@ static const struct msm_dsi_config msm8996_dsi_cfg = {
 	.num_dsi = 2,
 };
 
+static const char * const dsi_sdm845_bus_clk_names[] = {
+	"iface", "bus",
+};
+
+static const struct msm_dsi_config sdm845_dsi_cfg = {
+	.io_offset = DSI_6G_REG_SHIFT,
+	.reg_cfg = {
+		.num = 1,
+		.regs = {
+			{"vdda", 21800, 4 },	/* 1.2 V */
+		},
+	},
+	.bus_clk_names = dsi_sdm845_bus_clk_names,
+	.num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
+	.io_start = { 0xae94000, 0xae96000 },
+	.num_dsi = 2,
+};
+
 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
 	{MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064, &apq8064_dsi_cfg},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
@@ -131,6 +149,7 @@ static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3, &msm8994_dsi_cfg},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1, &msm8916_dsi_cfg},
 	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1, &msm8996_dsi_cfg},
+	{MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1, &sdm845_dsi_cfg},
 };
 
 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)