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authorNeil Armstrong <narmstrong@baylibre.com>2019-10-21 11:15:04 +0200
committerNeil Armstrong <narmstrong@baylibre.com>2019-12-10 10:08:45 +0100
commit63fba242c464ba3417d33f97bc0d47bbf46d0721 (patch)
tree9359749cf60919f250956e4c8d3fd3fc11cadc25 /drivers/gpu/drm/meson/Makefile
parentce7cb472108c37884c6084b317ceb07592906133 (diff)
downloadtalos-op-linux-63fba242c464ba3417d33f97bc0d47bbf46d0721.tar.gz
talos-op-linux-63fba242c464ba3417d33f97bc0d47bbf46d0721.zip
drm/meson: add RDMA module driver
The VPU embeds a "Register DMA" that can write a sequence of registers on the VPU AHB bus, either manually or triggered by an internal IRQ event like VSYNC or a line input counter. The initial implementation handles a single channel (over 8), triggered by the VSYNC irq and does not handle the RDMA irq. The RDMA will be usefull to reset and program the AFBC decoder unit on each vsync without involving the interrupt handler that can be masked for a log period of time, producing display glitches. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-5-narmstrong@baylibre.com
Diffstat (limited to 'drivers/gpu/drm/meson/Makefile')
-rw-r--r--drivers/gpu/drm/meson/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/meson/Makefile b/drivers/gpu/drm/meson/Makefile
index c389e2399133..fb7f5440fe57 100644
--- a/drivers/gpu/drm/meson/Makefile
+++ b/drivers/gpu/drm/meson/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0-only
meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_venc_cvbs.o
meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_overlay.o
+meson-drm-y += meson_rdma.o
obj-$(CONFIG_DRM_MESON) += meson-drm.o
obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o
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