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authorchunhui dai <chunhui.dai@mediatek.com>2018-10-03 11:41:43 +0800
committerCK Hu <ck.hu@mediatek.com>2018-10-03 11:56:32 +0800
commit79080159a7c1bcf7cd78713f920a42991bd3c871 (patch)
treec022a6d6b1425fce68b15b3d3d06193df1de583c /drivers/gpu/drm/mediatek/mtk_dpi_regs.h
parent0ace4b993c7a524962c6c17f3956a2d3cf2454e1 (diff)
downloadtalos-op-linux-79080159a7c1bcf7cd78713f920a42991bd3c871.tar.gz
talos-op-linux-79080159a7c1bcf7cd78713f920a42991bd3c871.zip
drm/mediatek: adjust EDGE to match clock and data
The default timing of DPI data and clock is not match. We could adjust this bit to make them match. Signed-off-by: chunhui dai <chunhui.dai@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
Diffstat (limited to 'drivers/gpu/drm/mediatek/mtk_dpi_regs.h')
-rw-r--r--drivers/gpu/drm/mediatek/mtk_dpi_regs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
index 040444d7718d..d9db8c4cacd7 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
+++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
@@ -223,5 +223,6 @@
#define ESAV_CODE2 (0xFFF << 0)
#define ESAV_CODE3_MSB BIT(16)
+#define EDGE_SEL_EN BIT(5)
#define H_FRE_2N BIT(25)
#endif /* __MTK_DPI_REGS_H */
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