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author | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-13 17:15:32 +0000 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-13 20:45:45 +0000 |
commit | 170594502cf591fd0789d7e5239937b1a87af4c6 (patch) | |
tree | 77757a21dd505037cace248c180f0d79f7c09d00 /drivers/gpu/drm/i915/selftests/i915_live_selftests.h | |
parent | 3d81d589d6e3c89b687771074f65cb8f3b59ccf3 (diff) | |
download | talos-op-linux-170594502cf591fd0789d7e5239937b1a87af4c6.tar.gz talos-op-linux-170594502cf591fd0789d7e5239937b1a87af4c6.zip |
drm/i915: Test coherency of and barriers between cache domains
Write into an object using WB, WC, GTT, and GPU paths and make sure that
our internal API is sufficient to ensure coherent reads and writes.
v2: Avoid invalid free upon allocation error
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170213171558.20942-21-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/selftests/i915_live_selftests.h')
-rw-r--r-- | drivers/gpu/drm/i915/selftests/i915_live_selftests.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h index d720b03e2c01..8f0c207dbe22 100644 --- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h +++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h @@ -11,3 +11,4 @@ selftest(sanitycheck, i915_live_sanitycheck) /* keep first (igt selfcheck) */ selftest(requests, i915_gem_request_live_selftests) selftest(objects, i915_gem_object_live_selftests) +selftest(coherency, i915_gem_coherency_live_selftests) |