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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-20 00:33:06 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-12-03 09:35:27 +0100 |
| commit | 99be1dfe06e56b6e32f522979e9cf354dad5dc2e (patch) | |
| tree | 2097727ef4e142da54d9a83ca853457a05397a8c /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | ecfe00d802d47af797f09cf8c88ad5ee7aa8d11b (diff) | |
| download | talos-op-linux-99be1dfe06e56b6e32f522979e9cf354dad5dc2e.tar.gz talos-op-linux-99be1dfe06e56b6e32f522979e9cf354dad5dc2e.zip | |
drm/i915: Move intel_init_pipe_control out of engine->init_hw
With this all the ->init_hw hooks really only set up hw state needed
to start the ring, all the software state setup and memory/buffer
allocations happen beforehand.
v2: We need to call intel_init_pipe_control after the ring init since
otherwise engine->dev is NULL and it falls over. Currently that's
now after the hw ring is enabled but a) we'll be fine as long as no
one submits a batch b) this will change soon.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 2a87b2261350..f0ffcf7c7eb3 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -865,12 +865,6 @@ static int init_render_ring(struct intel_engine_cs *ring) _MASKED_BIT_ENABLE(GFX_TLB_INVALIDATE_EXPLICIT) | _MASKED_BIT_ENABLE(GFX_REPLAY_MODE)); - if (INTEL_INFO(dev)->gen >= 5) { - ret = intel_init_pipe_control(ring); - if (ret) - return ret; - } - if (IS_GEN6(dev)) { /* From the Sandybridge PRM, volume 1 part 3, page 24: * "If this bit is set, STCunit will have LRA as replacement @@ -2459,7 +2453,17 @@ int intel_init_render_ring_buffer(struct drm_device *dev) ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj); } - return intel_init_ring_buffer(dev, ring); + ret = intel_init_ring_buffer(dev, ring); + if (ret) + return ret; + + if (INTEL_INFO(dev)->gen >= 5) { + ret = intel_init_pipe_control(ring); + if (ret) + return ret; + } + + return 0; } int intel_init_bsd_ring_buffer(struct drm_device *dev) |
