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authorJesse Barnes <jbarnes@virtuousgeek.org>2015-08-03 13:09:11 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-08-05 11:20:09 +0200
commit80aa93128653c5f2502053c0d9740b336d975667 (patch)
treee5b9cf9cf538f8f91841b2c430f21cd97f4cd796 /drivers/gpu/drm/i915/intel_display.c
parent245d96670d2655f70f4445d5247f26afbe705c84 (diff)
downloadtalos-op-linux-80aa93128653c5f2502053c0d9740b336d975667.tar.gz
talos-op-linux-80aa93128653c5f2502053c0d9740b336d975667.zip
drm/i915: disable_shared_pll doesn't work on pre-gen5
Looks like commit eddfcbcdc27fbecb33bff098967bbdd7ca75bfa6 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Mon Jun 15 12:33:53 2015 +0200 drm/i915: Update less state during modeset. introduced the unconditional calling of disable_shared_dpll, but didn't fix up pre-gen5 to avoid the BUG_ON at the top of the function. So change the BUG_ON into a gen check (alternately we could move the BUG_ON until later, since we shouldn't have a pll struct here either, but this seems clearer to read). This fixes a crash on load on my x200s platform. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f4ed4f13646c..9e4ced583ef0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1936,7 +1936,9 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
struct intel_shared_dpll *pll = intel_crtc_to_shared_dpll(crtc);
/* PCH only available on ILK+ */
- BUG_ON(INTEL_INFO(dev)->gen < 5);
+ if (INTEL_INFO(dev)->gen < 5)
+ return;
+
if (pll == NULL)
return;
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