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authorDamien Lespiau <damien.lespiau@intel.com>2013-05-03 18:48:11 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-05-10 21:56:34 +0200
commit8693a824873a0a97be77c1d5f1e98777f06f7305 (patch)
treed3659a095b2c86a2af17bee2c8c90c6ee235d40b /drivers/gpu/drm/i915/intel_ddi.c
parentecdb4eb71b8f76db2bf58c86af907e7b8ee056b0 (diff)
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drm/i915: Add references to some workaround we implement
We did not mention the workaround name when implementing those. This should help us track what we already implement. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 3e946d3cd196..146893288e53 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -174,6 +174,8 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
* mode set "sequence for CRT port" document:
* - TP1 to TP2 time with the default value
* - FDI delay to 90h
+ *
+ * WaFDIAutoLinkSetTimingOverrride:hsw
*/
I915_WRITE(_FDI_RXA_MISC, FDI_RX_PWRDN_LANE1_VAL(2) |
FDI_RX_PWRDN_LANE0_VAL(2) |
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