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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-11-03 13:50:41 +0200 |
|---|---|---|
| committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-11-03 13:50:41 +0200 |
| commit | 7d9a6ef558f6ff375aab9e29f08124cb0daa9bc5 (patch) | |
| tree | 3916e6cf9678a41081ae822ef67ec5cae1c1fffa /drivers/gpu/drm/i915/intel_ddi.c | |
| parent | 3fcf2b2a2529e268c537d8ad9dac5987ebc8a2f7 (diff) | |
| parent | 0224d45c9d46401b6d7018a96cfe049c5da7d91c (diff) | |
| download | talos-op-linux-7d9a6ef558f6ff375aab9e29f08124cb0daa9bc5.tar.gz talos-op-linux-7d9a6ef558f6ff375aab9e29f08124cb0daa9bc5.zip | |
Merge branch 'i2c/cht-wc-fusb302-immutable' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c/cht-wc-fusb302-immutable immutable branch from Wolfram Sang:
as discussed before, here is the immutable branch for the i2c-cht-wc
driver, so you can safely apply Hans' patch [1]
"platform/x86: intel_cht_int33fe: Update fusb302 type string, add properties"
on top of this.
[1] http://patchwork.ozlabs.org/patch/824314/
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ddi.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 4b4fd1f8110b..5e5fe03b638c 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -664,8 +664,8 @@ intel_ddi_get_buf_trans_fdi(struct drm_i915_private *dev_priv, int *n_entries) { if (IS_BROADWELL(dev_priv)) { - *n_entries = ARRAY_SIZE(hsw_ddi_translations_fdi); - return hsw_ddi_translations_fdi; + *n_entries = ARRAY_SIZE(bdw_ddi_translations_fdi); + return bdw_ddi_translations_fdi; } else if (IS_HASWELL(dev_priv)) { *n_entries = ARRAY_SIZE(hsw_ddi_translations_fdi); return hsw_ddi_translations_fdi; @@ -1655,7 +1655,8 @@ bool intel_ddi_get_hw_state(struct intel_encoder *encoder, out: if (ret && IS_GEN9_LP(dev_priv)) { tmp = I915_READ(BXT_PHY_CTL(port)); - if ((tmp & (BXT_PHY_LANE_POWERDOWN_ACK | + if ((tmp & (BXT_PHY_CMNLANE_POWERDOWN_ACK | + BXT_PHY_LANE_POWERDOWN_ACK | BXT_PHY_LANE_ENABLED)) != BXT_PHY_LANE_ENABLED) DRM_ERROR("Port %c enabled but PHY powered down? " "(PHY_CTL %08x)\n", port_name(port), tmp); @@ -2101,8 +2102,7 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder, * register writes. */ val = I915_READ(DPCLKA_CFGCR0); - val &= ~(DPCLKA_CFGCR0_DDI_CLK_OFF(port) | - DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port)); + val &= ~DPCLKA_CFGCR0_DDI_CLK_OFF(port); I915_WRITE(DPCLKA_CFGCR0, val); } else if (IS_GEN9_BC(dev_priv)) { /* DDI -> PLL mapping */ |
