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authorDave Airlie <airlied@redhat.com>2015-05-19 10:18:13 +1000
committerDave Airlie <airlied@redhat.com>2015-05-19 10:18:13 +1000
commitd0093404f808e23a480dbb4e05c083f1cfeddfd9 (patch)
tree1163b0f72daf3d7154cf511e1f1a9dbe577a4061 /drivers/gpu/drm/i915/intel_atomic_plane.c
parentdde10068e1a4798fa44e68a5d08b5dfe3602cbba (diff)
parent214a2b7fab215b1e979fbae51225b01b8fc58288 (diff)
downloadtalos-op-linux-d0093404f808e23a480dbb4e05c083f1cfeddfd9.tar.gz
talos-op-linux-d0093404f808e23a480dbb4e05c083f1cfeddfd9.zip
Merge tag 'drm-intel-next-2015-05-08' of git://anongit.freedesktop.org/drm-intel into drm-next
- skl plane scaler support (Chandra Kondru) - enable hsw cmd parser (Daniel and fix from Rebecca Palmer) - skl dc5/6 support (low power display modes) from Suketu&Sunil - dp compliance testing patches (Todd Previte) - dp link training optimization (Mika Kahola) - fixes to make skl resume work (Damien) - rework modeset code to fully use atomic state objects (Ander&Maarten) - pile of bxt w/a patchs from Nick Hoath - (linear) partial gtt mmap support (Joonas Lahtinen) * tag 'drm-intel-next-2015-05-08' of git://anongit.freedesktop.org/drm-intel: (103 commits) drm/i915: Update DRIVER_DATE to 20150508 drm/i915: Only wait for required lanes in vlv_wait_port_ready() drm/i915: Fix possible security hole in command parsing drm/edid: Kerneldoc for newly added edid_corrupt drm/i915: Reject huge tiled objects Revert "drm/i915: Hack to tie both common lanes together on chv" drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV drm/i915: Implement chv display PHY lane stagger setup drm/i915/vlv: remove wait for previous GFX clk disable request drm/i915: Set crtc_state->active to false when CRTC is disabled (v2) drm/i915/skl: Re-indent part of skl_ddi_calculate_wrpll() drm/i915: Use partial view in mmap fault handler drm/i915: Add a partial GGTT view type drm/i915: Consider object pinned if any VMA is pinned drm/i915: Do not make assumptions on GGTT VMA sizes drm/i915/bxt: Mark WaCcsTlbPrefetchDisable as for Broxton also. drm/i915/bxt: Mark WaDisablePartialResolveInVc as for Broxton also. drm/i915/bxt: Mark Wa4x4STCOptimizationDisable as for Broxton also. drm/i915/bxt: Move WaForceEnableNonCoherent to Skylake only drm/i915/bxt: Enable WaEnableYV12BugFixInHalfSliceChicken7 for Broxton ...
Diffstat (limited to 'drivers/gpu/drm/i915/intel_atomic_plane.c')
-rw-r--r--drivers/gpu/drm/i915/intel_atomic_plane.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
index dc8e1360fb20..86ba4b2c3a65 100644
--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
@@ -85,8 +85,8 @@ intel_plane_duplicate_state(struct drm_plane *plane)
return NULL;
state = &intel_state->base;
- if (state->fb)
- drm_framebuffer_reference(state->fb);
+
+ __drm_atomic_helper_plane_duplicate_state(plane, state);
return state;
}
@@ -111,6 +111,7 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
{
struct drm_crtc *crtc = state->crtc;
struct intel_crtc *intel_crtc;
+ struct intel_crtc_state *crtc_state;
struct intel_plane *intel_plane = to_intel_plane(plane);
struct intel_plane_state *intel_state = to_intel_plane_state(state);
@@ -126,6 +127,17 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
if (!crtc)
return 0;
+ /* FIXME: temporary hack necessary while we still use the plane update
+ * helper. */
+ if (state->state) {
+ crtc_state =
+ intel_atomic_get_crtc_state(state->state, intel_crtc);
+ if (IS_ERR(crtc_state))
+ return PTR_ERR(crtc_state);
+ } else {
+ crtc_state = intel_crtc->config;
+ }
+
/*
* The original src/dest coordinates are stored in state->base, but
* we want to keep another copy internal to our driver that we can
@@ -144,9 +156,9 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
intel_state->clip.x1 = 0;
intel_state->clip.y1 = 0;
intel_state->clip.x2 =
- intel_crtc->active ? intel_crtc->config->pipe_src_w : 0;
+ crtc_state->base.active ? crtc_state->pipe_src_w : 0;
intel_state->clip.y2 =
- intel_crtc->active ? intel_crtc->config->pipe_src_h : 0;
+ crtc_state->base.active ? crtc_state->pipe_src_h : 0;
/*
* Disabling a plane is always okay; we just need to update
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