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author | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-13 17:15:32 +0000 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2017-02-13 20:45:45 +0000 |
commit | 170594502cf591fd0789d7e5239937b1a87af4c6 (patch) | |
tree | 77757a21dd505037cace248c180f0d79f7c09d00 /drivers/gpu/drm/i915/i915_selftest.h | |
parent | 3d81d589d6e3c89b687771074f65cb8f3b59ccf3 (diff) | |
download | talos-op-linux-170594502cf591fd0789d7e5239937b1a87af4c6.tar.gz talos-op-linux-170594502cf591fd0789d7e5239937b1a87af4c6.zip |
drm/i915: Test coherency of and barriers between cache domains
Write into an object using WB, WC, GTT, and GPU paths and make sure that
our internal API is sufficient to ensure coherent reads and writes.
v2: Avoid invalid free upon allocation error
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170213171558.20942-21-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_selftest.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_selftest.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_selftest.h b/drivers/gpu/drm/i915/i915_selftest.h index 8b5994caa301..e43777b72211 100644 --- a/drivers/gpu/drm/i915/i915_selftest.h +++ b/drivers/gpu/drm/i915/i915_selftest.h @@ -99,4 +99,6 @@ bool __igt_timeout(unsigned long timeout, const char *fmt, ...); #define igt_timeout(t, fmt, ...) \ __igt_timeout((t), KERN_WARNING pr_fmt(fmt), ##__VA_ARGS__) +#define igt_can_mi_store_dword_imm(D) (INTEL_GEN(D) > 2) + #endif /* !__I915_SELFTEST_H__ */ |