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| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2014-04-28 19:29:25 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-05 16:01:58 +0200 |
| commit | 9bcb144c83d4df12c8150352fa876aeff289e39c (patch) | |
| tree | da8a9e0208c9b32704cad6eeb76e844cb8e24e01 /drivers/gpu/drm/i915/i915_gem_execbuffer.c | |
| parent | 192d47a64ea3f50387079e1f91276f9b683bee46 (diff) | |
| download | talos-op-linux-9bcb144c83d4df12c8150352fa876aeff289e39c.tar.gz talos-op-linux-9bcb144c83d4df12c8150352fa876aeff289e39c.zip | |
drm/i915: Support 64b execbuf
Previously, our code only had a 32b offset value for where the
batchbuffer starts. With full PPGTT, and 64b canonical GPU address
space, that is an insufficient value. The code to expand is pretty
straight forward, and only one platform needs to do anything with the
extra bits.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_gem_execbuffer.c')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 6cc004f5d017..3c4e77024dcd 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1049,7 +1049,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, struct i915_hw_context *ctx; struct i915_address_space *vm; const u32 ctx_id = i915_execbuffer2_get_context_id(*args); - u32 exec_start = args->batch_start_offset, exec_len; + u64 exec_start = args->batch_start_offset, exec_len; u32 mask, flags; int ret, mode, i; bool need_relocs; |
