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author | Takashi Iwai <tiwai@suse.de> | 2019-09-10 13:03:08 +0200 |
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committer | Takashi Iwai <tiwai@suse.de> | 2019-09-10 13:03:08 +0200 |
commit | 7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2 (patch) | |
tree | dd35ad21e0eb13572757dab279ae41f6d953baed /drivers/gpu/drm/i915/display/vlv_dsi_pll.c | |
parent | 789492f0c86505e63369907bcb1afdf52dec9366 (diff) | |
parent | bb831786117519fc16dfd3eaa7b84e4f6bbb8d99 (diff) | |
download | talos-op-linux-7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2.tar.gz talos-op-linux-7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2.zip |
Merge tag 'asoc-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v5.4
Quite a big update this time around, particularly in the core
where we've had a lot of cleanups from Morimoto-san - there's
not much functional change but quite a bit of modernization
going on. We've also seen a lot of driver work, a lot of it
cleanups but also some particular drivers.
- Lots and lots of cleanups from Morimoto-san and Yue Haibing.
- Lots of cleanups and enhancements to the Freescale, sunxi dnd
Intel rivers.
- Initial Sound Open Firmware suppot for i.MX8.
- Removal of w90x900 and nuc900 drivers as the platforms are
being removed.
- New support for Cirrus Logic CS47L15 and CS47L92, Freescale
i.MX 7ULP and 8MQ, Meson G12A and NXP UDA1334
Diffstat (limited to 'drivers/gpu/drm/i915/display/vlv_dsi_pll.c')
-rw-r--r-- | drivers/gpu/drm/i915/display/vlv_dsi_pll.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c index 99cc3e2e9c2c..f016a776a39e 100644 --- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c +++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c @@ -396,8 +396,8 @@ static void glk_dsi_program_esc_clock(struct drm_device *dev, else txesc2_div = 10; - I915_WRITE(MIPIO_TXESC_CLK_DIV1, txesc1_div & GLK_TX_ESC_CLK_DIV1_MASK); - I915_WRITE(MIPIO_TXESC_CLK_DIV2, txesc2_div & GLK_TX_ESC_CLK_DIV2_MASK); + I915_WRITE(MIPIO_TXESC_CLK_DIV1, (1 << (txesc1_div - 1)) & GLK_TX_ESC_CLK_DIV1_MASK); + I915_WRITE(MIPIO_TXESC_CLK_DIV2, (1 << (txesc2_div - 1)) & GLK_TX_ESC_CLK_DIV2_MASK); } /* Program BXT Mipi clocks and dividers */ |