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| author | Andrzej Hajda <a.hajda@samsung.com> | 2017-02-01 08:47:32 +0100 |
|---|---|---|
| committer | Archit Taneja <architt@codeaurora.org> | 2017-02-02 15:15:23 +0530 |
| commit | 2c8fb853c063181bf80154e2fc3474d6f8c4a89c (patch) | |
| tree | 3c9c7afc2320217df6629b8b64dc08b235e4da30 /drivers/gpu/drm/bridge/sil-sii8620.h | |
| parent | 0c2d18756b5b54f2ae5d00ff841c3db608d33fb9 (diff) | |
| download | talos-op-linux-2c8fb853c063181bf80154e2fc3474d6f8c4a89c.tar.gz talos-op-linux-2c8fb853c063181bf80154e2fc3474d6f8c4a89c.zip | |
drm/bridge/sii8620: initial support for eCBUS-S mode
The Single-ended eCBUS Mode (eCBUS-S) mode provides 60 Mb/s full-duplex
bidirectional traffic for three channels:
- CBUS data (CBUS1 channel),
- High-bandwidth MHL data (eMSC channel),
- tunneling data (T-CBUS channel).
It is required to fully support MHL3 dongles.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-6-git-send-email-a.hajda@samsung.com
Diffstat (limited to 'drivers/gpu/drm/bridge/sil-sii8620.h')
| -rw-r--r-- | drivers/gpu/drm/bridge/sil-sii8620.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/bridge/sil-sii8620.h b/drivers/gpu/drm/bridge/sil-sii8620.h index 6ff616a4f6ce..3ee4e7e42226 100644 --- a/drivers/gpu/drm/bridge/sil-sii8620.h +++ b/drivers/gpu/drm/bridge/sil-sii8620.h @@ -841,6 +841,8 @@ #define MSK_MHL_DP_CTL7_DT_DRV_VBIAS_CASCTL 0xf0 #define MSK_MHL_DP_CTL7_DT_DRV_IREF_CTL 0x0f +#define REG_MHL_DP_CTL8 0x0352 + /* Tx Zone Ctl1, default value: 0x00 */ #define REG_TX_ZONE_CTL1 0x0361 #define VAL_TX_ZONE_CTL1_TX_ZONE_CTRL_MODE 0x08 @@ -1088,6 +1090,9 @@ /* CoC Status, default value: 0x00 */ #define REG_COC_STAT_0 0x0700 +#define BIT_COC_STAT_0_PLL_LOCKED BIT(7) +#define MSK_COC_STAT_0_FSM_STATE 0x0f + #define REG_COC_STAT_1 0x0701 #define REG_COC_STAT_2 0x0702 #define REG_COC_STAT_3 0x0703 |
