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authorLinus Torvalds <torvalds@linux-foundation.org>2017-05-03 11:44:24 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-05-03 11:44:24 -0700
commit2f34c1231bfc9f2550f934acb268ac7315fb3837 (patch)
treeff8114b3b4ec4723a11b041c6b74c389e9f0eeb9 /drivers/gpu/drm/amd/include/atomfirmwareid.h
parenta3719f34fdb664ffcfaec2160ef20fca7becf2ee (diff)
parent8b03d1ed2c43a2ba5ef3381322ee4515b97381bf (diff)
downloadtalos-op-linux-2f34c1231bfc9f2550f934acb268ac7315fb3837.tar.gz
talos-op-linux-2f34c1231bfc9f2550f934acb268ac7315fb3837.zip
Merge tag 'drm-for-v4.12' of git://people.freedesktop.org/~airlied/linux
Pull drm u pdates from Dave Airlie: "This is the main drm pull request for v4.12. Apart from two fixes pulls, everything should have been in drm-next for at least 2 weeks. The biggest thing in here is AMD released the public headers for their upcoming VEGA GPUs. These as always are quite a sizeable chunk of header files. They've also added initial non-display support for those GPUs, though they aren't available in production yet. Otherwise it's pretty much normal. New bridge drivers: - megachips-stdpxxxx-ge-b850v3-fw LVDS->DP++ - generic LVDS bridge support. Core: - Displayport link train failure reporting to userspace - debugfs interface cleaned up - subsystem TODO in kerneldoc now - Extended fbdev support (flipping and vblank wait) - drm_platform removed - EDP CRC support in helper - HF-VSDB SCDC support in EDID parser - Lots of code cleanups and header extraction - Thunderbolt external GPU awareness - Atomic helper improvements - Documentation improvements panel: - Sitronix and Samsung new panel support amdgpu: - Preliminary vega10 support - Multi-level page table support - GPU sensor support for userspace - PRT support for sparse buffers - SR-IOV improvements - Non-contig VRAM CPU mapping i915: - Atomic modesetting enabled by default on Gen5+ - LSPCON improvements - Atomic state handling for cdclk - GPU reset improvements - In-kernel unit tests - Geminilake improvements and color manager support - Designware i2c fixes - vblank evasion improvements - Hotplug safe connector iterators - GVT scheduler QoS support - GVT Kabylake support nouveau: - Acceleration support for Pascal (GP10x). - Rearchitecture of code handling proprietary signed firmware - Fix GTX 970 with odd MMU configuration - GP10B support - GP107 acceleration support vmwgfx: - Atomic modesetting support for vmwgfx omapdrm: - Support for render nodes - Refactor omapdss code - Fix some probe ordering issues - Fix too dark RGB565 rendering sunxi: - prelim rework for multiple pipes. mali-dp: - Color management support - Plane scaling - Power management improvements imx-drm: - Prefetch Resolve Engine/Gasket on i.MX6QP - Deferred plane disabling - Separate alpha support mediatek: - Mediatek SoC MT2701 support rcar-du: - Gen3 HDMI support msm: - 4k support for newer chips - OPP bindings for gpu - prep work for per-process pagetables vc4: - HDMI audio support - fixes qxl: - minor fixes. dw-hdmi: - PHY improvements - CSC fixes - Amlogic GX SoC support" * tag 'drm-for-v4.12' of git://people.freedesktop.org/~airlied/linux: (1778 commits) drm/nouveau/fb/gf100-: Fix 32 bit wraparound in new ram detection drm/nouveau/secboot/gm20b: fix the error return code in gm20b_secboot_tegra_read_wpr() drm/nouveau/kms: Increase max retries in scanout position queries. drm/nouveau/bios/bitP: check that table is long enough for optional pointers drm/nouveau/fifo/nv40: no ctxsw for pre-nv44 mpeg engine drm: mali-dp: use div_u64 for expensive 64-bit divisions drm/i915: Confirm the request is still active before adding it to the await drm/i915: Avoid busy-spinning on VLV_GLTC_PW_STATUS mmio drm/i915/selftests: Allocate inode/file dynamically drm/i915: Fix system hang with EI UP masked on Haswell drm/i915: checking for NULL instead of IS_ERR() in mock selftests drm/i915: Perform link quality check unconditionally during long pulse drm/i915: Fix use after free in lpe_audio_platdev_destroy() drm/i915: Use the right mapping_gfp_mask for final shmem allocation drm/i915: Make legacy cursor updates more unsynced drm/i915: Apply a cond_resched() to the saturated signaler drm/i915: Park the signaler before sleeping drm: mali-dp: Check the mclk rate and allow up/down scaling drm: mali-dp: Enable image enhancement when scaling drm: mali-dp: Add plane upscaling support ...
Diffstat (limited to 'drivers/gpu/drm/amd/include/atomfirmwareid.h')
-rw-r--r--drivers/gpu/drm/amd/include/atomfirmwareid.h86
1 files changed, 86 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/atomfirmwareid.h b/drivers/gpu/drm/amd/include/atomfirmwareid.h
new file mode 100644
index 000000000000..e6256efd03ae
--- /dev/null
+++ b/drivers/gpu/drm/amd/include/atomfirmwareid.h
@@ -0,0 +1,86 @@
+/****************************************************************************\
+*
+* File Name atomfirmwareid.h
+*
+* Description ATOM BIOS command/data table ID definition header file
+*
+* Copyright 2016 Advanced Micro Devices, Inc.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
+* and associated documentation files (the "Software"), to deal in the Software without restriction,
+* including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
+* and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
+* subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in all copies or substantial
+* portions of the Software.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+* OTHER DEALINGS IN THE SOFTWARE.
+*
+\****************************************************************************/
+
+#ifndef _ATOMFIRMWAREID_H_
+#define _ATOMFIRMWAREID_H_
+
+enum atom_master_data_table_id
+{
+ VBIOS_DATA_TBL_ID__UTILITY_PIPELINE,
+ VBIOS_DATA_TBL_ID__MULTIMEDIA_INF,
+ VBIOS_DATA_TBL_ID__FIRMWARE_INF,
+ VBIOS_DATA_TBL_ID__LCD_INF,
+ VBIOS_DATA_TBL_ID__SMU_INF,
+ VBIOS_DATA_TBL_ID__VRAM_USAGE_BY_FIRMWARE,
+ VBIOS_DATA_TBL_ID__GPIO_PIN_LUT,
+ VBIOS_DATA_TBL_ID__GFX_INF,
+ VBIOS_DATA_TBL_ID__POWER_PLAY_INF,
+ VBIOS_DATA_TBL_ID__DISPLAY_OBJECT_INF,
+ VBIOS_DATA_TBL_ID__INDIRECT_IO_ACCESS,
+ VBIOS_DATA_TBL_ID__UMC_INF,
+ VBIOS_DATA_TBL_ID__DCE_INF,
+ VBIOS_DATA_TBL_ID__VRAM_INF,
+ VBIOS_DATA_TBL_ID__INTEGRATED_SYS_INF,
+ VBIOS_DATA_TBL_ID__ASIC_PROFILING_INF,
+ VBIOS_DATA_TBL_ID__VOLTAGE_OBJ_INF,
+
+ VBIOS_DATA_TBL_ID__UNDEFINED,
+};
+
+enum atom_master_command_table_id
+{
+ VBIOS_CMD_TBL_ID__ASIC_INIT,
+ VBIOS_CMD_TBL_ID__DIGX_ENCODER_CONTROL,
+ VBIOS_CMD_TBL_ID__SET_ENGINE_CLOCK,
+ VBIOS_CMD_TBL_ID__SET_MEMORY_CLOCK,
+ VBIOS_CMD_TBL_ID__SET_PIXEL_CLOCK,
+ VBIOS_CMD_TBL_ID__ENABLE_DISP_POWER_GATING,
+ VBIOS_CMD_TBL_ID__BLANK_CRTC,
+ VBIOS_CMD_TBL_ID__ENABLE_CRTC,
+ VBIOS_CMD_TBL_ID__GET_SMU_CLOCK_INFO,
+ VBIOS_CMD_TBL_ID__SELECT_CRTC_SOURCE,
+ VBIOS_CMD_TBL_ID__SET_DCE_CLOCK,
+ VBIOS_CMD_TBL_ID__GET_MEMORY_CLOCK,
+ VBIOS_CMD_TBL_ID__GET_ENGINE_CLOCK,
+ VBIOS_CMD_TBL_ID__SET_CRTC_USING_DTD_TIMING,
+ VBIOS_CMD_TBL_ID__EXTENAL_ENCODER_CONTROL,
+ VBIOS_CMD_TBL_ID__PROCESS_I2C_CHANNEL_TRANSACTION,
+ VBIOS_CMD_TBL_ID__COMPUTE_GPU_CLOCK_PARAM,
+ VBIOS_CMD_TBL_ID__DYNAMIC_MEMORY_SETTINGS,
+ VBIOS_CMD_TBL_ID__MEMORY_TRAINING,
+ VBIOS_CMD_TBL_ID__SET_VOLTAGE,
+ VBIOS_CMD_TBL_ID__DIG1_TRANSMITTER_CONTROL,
+ VBIOS_CMD_TBL_ID__PROCESS_AUX_CHANNEL_TRANSACTION,
+ VBIOS_CMD_TBL_ID__GET_VOLTAGE_INF,
+
+ VBIOS_CMD_TBL_ID__UNDEFINED,
+};
+
+
+
+#endif /* _ATOMFIRMWAREID_H_ */
+/* ### EOF ### */
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