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author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-10-28 17:49:53 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-10-28 17:49:53 -0700 |
commit | 53b3b6bbfde6aae8d1ededc86ad4e0e1e00eb5f8 (patch) | |
tree | b29473f21270aefd113b298c9402be8b4b3c91b4 /drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | |
parent | 746bb4ed6d626f3f9e431a7f9b20504538e62ded (diff) | |
parent | f2bfc71aee75feff33ca659322b72ffeed5a243d (diff) | |
download | talos-op-linux-53b3b6bbfde6aae8d1ededc86ad4e0e1e00eb5f8.tar.gz talos-op-linux-53b3b6bbfde6aae8d1ededc86ad4e0e1e00eb5f8.zip |
Merge tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie:
"This is going to rebuild more than drm as it adds a new helper to
list.h for doing bulk updates. Seemed like a reasonable addition to
me.
Otherwise the usual merge window stuff lots of i915 and amdgpu, not so
much nouveau, and piles of everything else.
Core:
- Adds a new list.h helper for doing bulk list updates for TTM.
- Don't leak fb address in smem_start to userspace (comes with EXPORT
workaround for people using mali out of tree hacks)
- udmabuf device to turn memfd regions into dma-buf
- Per-plane blend mode property
- ref/unref replacements with get/put
- fbdev conflicting framebuffers code cleaned up
- host-endian format variants
- panel orientation quirk for Acer One 10
bridge:
- TI SN65DSI86 chip support
vkms:
- GEM support.
- Cursor support
amdgpu:
- Merge amdkfd and amdgpu into one module
- CEC over DP AUX support
- Picasso APU support + VCN dynamic powergating
- Raven2 APU support
- Vega20 enablement + kfd support
- ACP powergating improvements
- ABGR/XBGR display support
- VCN jpeg support
- xGMI support
- DC i2c/aux cleanup
- Ycbcr 4:2:0 support
- GPUVM improvements
- Powerplay and powerplay endian fixes
- Display underflow fixes
vmwgfx:
- Move vmwgfx specific TTM code to vmwgfx
- Split out vmwgfx buffer/resource validation code
- Atomic operation rework
bochs:
- use more helpers
- format/byteorder improvements
qxl:
- use more helpers
i915:
- GGTT coherency getparam
- Turn off resource streamer API
- More Icelake enablement + DMC firmware
- Full PPGTT for Ivybridge, Haswell and Valleyview
- DDB distribution based on resolution
- Limited range DP display support
nouveau:
- CEC over DP AUX support
- Initial HDMI 2.0 support
virtio-gpu:
- vmap support for PRIME objects
tegra:
- Initial Tegra194 support
- DMA/IOMMU integration fixes
msm:
- a6xx perf improvements + clock prefix
- GPU preemption optimisations
- a6xx devfreq support
- cursor support
rockchip:
- PX30 support
- rgb output interface support
mediatek:
- HDMI output support on mt2701 and mt7623
rcar-du:
- Interlaced modes on Gen3
- LVDS on R8A77980
- D3 and E3 SoC support
hisilicon:
- misc fixes
mxsfb:
- runtime pm support
sun4i:
- R40 TCON support
- Allwinner A64 support
- R40 HDMI support
omapdrm:
- Driver rework changing display pipeline ordering to use common code
- DMM memory barrier and irq fixes
- Errata workarounds
exynos:
- out-bridge support for LVDS bridge driver
- Samsung 16x16 tiled format support
- Plane alpha and pixel blend mode support
tilcdc:
- suspend/resume update
mali-dp:
- misc updates"
* tag 'drm-next-2018-10-24' of git://anongit.freedesktop.org/drm/drm: (1382 commits)
firmware/dmc/icl: Add missing MODULE_FIRMWARE() for Icelake.
drm/i915/icl: Fix signal_levels
drm/i915/icl: Fix DDI/TC port clk_off bits
drm/i915/icl: create function to identify combophy port
drm/i915/gen9+: Fix initial readout for Y tiled framebuffers
drm/i915: Large page offsets for pread/pwrite
drm/i915/selftests: Disable shrinker across mmap-exhaustion
drm/i915/dp: Link train Fallback on eDP only if fallback link BW can fit panel's native mode
drm/i915: Fix intel_dp_mst_best_encoder()
drm/i915: Skip vcpi allocation for MSTB ports that are gone
drm/i915: Don't unset intel_connector->mst_port
drm/i915: Only reset seqno if actually idle
drm/i915: Use the correct crtc when sanitizing plane mapping
drm/i915: Restore vblank interrupts earlier
drm/i915: Check fb stride against plane max stride
drm/amdgpu/vcn:Fix uninitialized symbol error
drm: panel-orientation-quirks: Add quirk for Acer One 10 (S1003)
drm/amd/amdgpu: Fix debugfs error handling
drm/amdgpu: Update gc_9_0 golden settings.
drm/amd/powerplay: update PPtable with DC BTC and Tvr SocLimit fields
...
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 65 |
1 files changed, 53 insertions, 12 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h index 129209686848..8b8720e9c3f0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h @@ -32,8 +32,10 @@ #define PSP_CMD_BUFFER_SIZE 0x1000 #define PSP_ASD_SHARED_MEM_SIZE 0x4000 #define PSP_1_MEG 0x100000 +#define PSP_TMR_SIZE 0x400000 struct psp_context; +struct psp_xgmi_topology_info; enum psp_ring_type { @@ -63,18 +65,27 @@ struct psp_funcs int (*prep_cmd_buf)(struct amdgpu_firmware_info *ucode, struct psp_gfx_cmd_resp *cmd); int (*ring_init)(struct psp_context *psp, enum psp_ring_type ring_type); - int (*ring_create)(struct psp_context *psp, enum psp_ring_type ring_type); + int (*ring_create)(struct psp_context *psp, + enum psp_ring_type ring_type); int (*ring_stop)(struct psp_context *psp, enum psp_ring_type ring_type); int (*ring_destroy)(struct psp_context *psp, enum psp_ring_type ring_type); - int (*cmd_submit)(struct psp_context *psp, struct amdgpu_firmware_info *ucode, - uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr, int index); + int (*cmd_submit)(struct psp_context *psp, + struct amdgpu_firmware_info *ucode, + uint64_t cmd_buf_mc_addr, uint64_t fence_mc_addr, + int index); bool (*compare_sram_data)(struct psp_context *psp, struct amdgpu_firmware_info *ucode, enum AMDGPU_UCODE_ID ucode_type); bool (*smu_reload_quirk)(struct psp_context *psp); int (*mode1_reset)(struct psp_context *psp); + uint64_t (*xgmi_get_device_id)(struct psp_context *psp); + uint64_t (*xgmi_get_hive_id)(struct psp_context *psp); + int (*xgmi_get_topology_info)(struct psp_context *psp, int number_devices, + struct psp_xgmi_topology_info *topology); + int (*xgmi_set_topology_info)(struct psp_context *psp, int number_devices, + struct psp_xgmi_topology_info *topology); }; struct psp_context @@ -83,11 +94,11 @@ struct psp_context struct psp_ring km_ring; struct psp_gfx_cmd_resp *cmd; - const struct psp_funcs *funcs; + const struct psp_funcs *funcs; /* fence buffer */ - struct amdgpu_bo *fw_pri_bo; - uint64_t fw_pri_mc_addr; + struct amdgpu_bo *fw_pri_bo; + uint64_t fw_pri_mc_addr; void *fw_pri_buf; /* sos firmware */ @@ -100,8 +111,8 @@ struct psp_context uint8_t *sos_start_addr; /* tmr buffer */ - struct amdgpu_bo *tmr_bo; - uint64_t tmr_mc_addr; + struct amdgpu_bo *tmr_bo; + uint64_t tmr_mc_addr; void *tmr_buf; /* asd firmware and buffer */ @@ -110,13 +121,13 @@ struct psp_context uint32_t asd_feature_version; uint32_t asd_ucode_size; uint8_t *asd_start_addr; - struct amdgpu_bo *asd_shared_bo; - uint64_t asd_shared_mc_addr; + struct amdgpu_bo *asd_shared_bo; + uint64_t asd_shared_mc_addr; void *asd_shared_buf; /* fence buffer */ - struct amdgpu_bo *fence_buf_bo; - uint64_t fence_buf_mc_addr; + struct amdgpu_bo *fence_buf_bo; + uint64_t fence_buf_mc_addr; void *fence_buf; /* cmd buffer */ @@ -130,6 +141,23 @@ struct amdgpu_psp_funcs { enum AMDGPU_UCODE_ID); }; +struct psp_xgmi_topology_info { + /* Generated by PSP to identify the GPU instance within xgmi connection */ + uint64_t device_id; + /* + * If all bits set to 0 , driver indicates it wants to retrieve the xgmi + * connection vector topology, but not access enable the connections + * if some or all bits are set to 1, driver indicates it want to retrieve the + * current xgmi topology and access enable the link to GPU[i] associated + * with the bit position in the vector. + * On return,: bits indicated which xgmi links are present/active depending + * on the value passed in. The relative bit offset for the relative GPU index + * within the hive is always marked active. + */ + uint32_t connection_mask; + uint32_t reserved; /* must be 0 */ +}; + #define psp_prep_cmd_buf(ucode, type) (psp)->funcs->prep_cmd_buf((ucode), (type)) #define psp_ring_init(psp, type) (psp)->funcs->ring_init((psp), (type)) #define psp_ring_create(psp, type) (psp)->funcs->ring_create((psp), (type)) @@ -149,6 +177,18 @@ struct amdgpu_psp_funcs { ((psp)->funcs->smu_reload_quirk ? (psp)->funcs->smu_reload_quirk((psp)) : false) #define psp_mode1_reset(psp) \ ((psp)->funcs->mode1_reset ? (psp)->funcs->mode1_reset((psp)) : false) +#define psp_xgmi_get_device_id(psp) \ + ((psp)->funcs->xgmi_get_device_id ? (psp)->funcs->xgmi_get_device_id((psp)) : 0) +#define psp_xgmi_get_hive_id(psp) \ + ((psp)->funcs->xgmi_get_hive_id ? (psp)->funcs->xgmi_get_hive_id((psp)) : 0) +#define psp_xgmi_get_topology_info(psp, num_device, topology) \ + ((psp)->funcs->xgmi_get_topology_info ? \ + (psp)->funcs->xgmi_get_topology_info((psp), (num_device), (topology)) : -EINVAL) +#define psp_xgmi_set_topology_info(psp, num_device, topology) \ + ((psp)->funcs->xgmi_set_topology_info ? \ + (psp)->funcs->xgmi_set_topology_info((psp), (num_device), (topology)) : -EINVAL) + +#define amdgpu_psp_check_fw_loading_status(adev, i) (adev)->firmware.funcs->check_fw_loading_status((adev), (i)) extern const struct amd_ip_funcs psp_ip_funcs; @@ -159,5 +199,6 @@ extern int psp_wait_for(struct psp_context *psp, uint32_t reg_index, extern const struct amdgpu_ip_block_version psp_v10_0_ip_block; int psp_gpu_reset(struct amdgpu_device *adev); +extern const struct amdgpu_ip_block_version psp_v11_0_ip_block; #endif |