diff options
author | H. Peter Anvin <hpa@linux.intel.com> | 2014-06-18 15:26:19 -0700 |
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committer | H. Peter Anvin <hpa@linux.intel.com> | 2014-06-18 15:26:19 -0700 |
commit | 03ab3da3b215bac4ebb093c808d54596e03e3225 (patch) | |
tree | a42534bb7f314b561b362ad0b5af7eff8dbb9726 /drivers/gpio/gpio-sch.c | |
parent | 6229ad278ca74acdbc8bd3a3d469322a3de91039 (diff) | |
parent | 7171511eaec5bf23fb06078f59784a3a0626b38f (diff) | |
download | talos-op-linux-03ab3da3b215bac4ebb093c808d54596e03e3225.tar.gz talos-op-linux-03ab3da3b215bac4ebb093c808d54596e03e3225.zip |
Merge tag 'v3.16-rc1' into x86/cpufeature
Linux 3.16-rc1
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'drivers/gpio/gpio-sch.c')
-rw-r--r-- | drivers/gpio/gpio-sch.c | 26 |
1 files changed, 22 insertions, 4 deletions
diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c index 5af65719b95d..a9b1cd16c848 100644 --- a/drivers/gpio/gpio-sch.c +++ b/drivers/gpio/gpio-sch.c @@ -97,8 +97,6 @@ static int sch_gpio_core_direction_out(struct gpio_chip *gc, u8 curr_dirs; unsigned short offset, bit; - sch_gpio_core_set(gc, gpio_num, val); - spin_lock(&gpio_lock); offset = CGIO + gpio_num / 8; @@ -109,6 +107,17 @@ static int sch_gpio_core_direction_out(struct gpio_chip *gc, outb(curr_dirs & ~(1 << bit), gpio_ba + offset); spin_unlock(&gpio_lock); + + /* + * according to the datasheet, writing to the level register has no + * effect when GPIO is programmed as input. + * Actually the the level register is read-only when configured as input. + * Thus presetting the output level before switching to output is _NOT_ possible. + * Hence we set the level after configuring the GPIO as output. + * But we cannot prevent a short low pulse if direction is set to high + * and an external pull-up is connected. + */ + sch_gpio_core_set(gc, gpio_num, val); return 0; } @@ -178,8 +187,6 @@ static int sch_gpio_resume_direction_out(struct gpio_chip *gc, u8 curr_dirs; unsigned short offset, bit; - sch_gpio_resume_set(gc, gpio_num, val); - offset = RGIO + gpio_num / 8; bit = gpio_num % 8; @@ -190,6 +197,17 @@ static int sch_gpio_resume_direction_out(struct gpio_chip *gc, outb(curr_dirs & ~(1 << bit), gpio_ba + offset); spin_unlock(&gpio_lock); + + /* + * according to the datasheet, writing to the level register has no + * effect when GPIO is programmed as input. + * Actually the the level register is read-only when configured as input. + * Thus presetting the output level before switching to output is _NOT_ possible. + * Hence we set the level after configuring the GPIO as output. + * But we cannot prevent a short low pulse if direction is set to high + * and an external pull-up is connected. + */ + sch_gpio_resume_set(gc, gpio_num, val); return 0; } |