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| author | Olof Johansson <olof@lixom.net> | 2013-11-15 15:17:59 -0800 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-11-15 15:17:59 -0800 |
| commit | 6886059f2ef5d62c73e87a905e84fa4f87d56074 (patch) | |
| tree | dfe6e1611d7c50057df52db7b55eafbfb8e33a93 /drivers/clocksource/clksrc-dbx500-prcmu.c | |
| parent | ca439c9b983ffa14e9eae6030e3ee80ad039388f (diff) | |
| parent | 26273e02a0cf18eb72416559310d3294390a9024 (diff) | |
| download | talos-op-linux-6886059f2ef5d62c73e87a905e84fa4f87d56074.tar.gz talos-op-linux-6886059f2ef5d62c73e87a905e84fa4f87d56074.zip | |
Merge tag 'omap-for-v3.13/fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Few clock fixes, a runtime PM fix, and pinctrl-single fix along
with few other fixes that popped up during the merge window.
* tag 'omap-for-v3.13/fixes-for-merge-window-take2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Fix build for dra7xx without omap4 and 5
ARM: OMAP2+: omap_device: maintain sane runtime pm status around suspend/resume
doc: devicetree: Add bindings documentation for omap-des driver
ARM: dts: doc: Document missing compatible property for omap-sham driver
ARM: OMAP3: Beagle: fix return value check in beagle_opp_init()
ARM: OMAP: devicetree: fix SPI node compatible property syntax items
pinctrl: single: call pcs_soc->rearm() whenever IRQ mask is changed
ARM: OMAP2+: smsc911x: fix return value check in gpmc_smsc911x_init()
+ sync with newer trunk
Diffstat (limited to 'drivers/clocksource/clksrc-dbx500-prcmu.c')
| -rw-r--r-- | drivers/clocksource/clksrc-dbx500-prcmu.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c index a9fd4ad25674..b375106844d8 100644 --- a/drivers/clocksource/clksrc-dbx500-prcmu.c +++ b/drivers/clocksource/clksrc-dbx500-prcmu.c @@ -53,7 +53,7 @@ static struct clocksource clocksource_dbx500_prcmu = { #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK -static u32 notrace dbx500_prcmu_sched_clock_read(void) +static u64 notrace dbx500_prcmu_sched_clock_read(void) { if (unlikely(!clksrc_dbx500_timer_base)) return 0; @@ -81,8 +81,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base) clksrc_dbx500_timer_base + PRCMU_TIMER_REF); } #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK - setup_sched_clock(dbx500_prcmu_sched_clock_read, - 32, RATE_32K); + sched_clock_register(dbx500_prcmu_sched_clock_read, 32, RATE_32K); #endif clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); } |
