diff options
| author | Tony Lindgren <tony@atomide.com> | 2016-03-30 10:36:06 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-03-30 10:36:06 -0700 |
| commit | 1809de7e7d37c585e01a1bcc583ea92b78fc759d (patch) | |
| tree | 76c5b35c2b04eafce86a1a729c02ab705eba44bc /drivers/clk/tegra/clk-tegra-fixed.c | |
| parent | ebf24414809200915b9ddf7f109bba7c278c8210 (diff) | |
| parent | 3ca4a238106dedc285193ee47f494a6584b6fd2f (diff) | |
| download | talos-op-linux-1809de7e7d37c585e01a1bcc583ea92b78fc759d.tar.gz talos-op-linux-1809de7e7d37c585e01a1bcc583ea92b78fc759d.zip | |
Merge tag 'for-v4.6-rc/omap-fixes-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v4.6/fixes
ARM: OMAP2+: first hwmod fix for v4.6-rc
Fix a longstanding bug in the hwmod code that could cause
hardware SYSCONFIG register values to not match the kernel's
idea of what they should be, and that could result in lower
performance during IP block idle entry.
Basic build, boot, and PM test logs are available here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-fixes-a-for-v4.6-rc/20160326231727/
Diffstat (limited to 'drivers/clk/tegra/clk-tegra-fixed.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra-fixed.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c index da0b5941c89f..d64ec7a1b976 100644 --- a/drivers/clk/tegra/clk-tegra-fixed.c +++ b/drivers/clk/tegra/clk-tegra-fixed.c @@ -52,8 +52,7 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, struct tegra_clk *clks, return -EINVAL; } - osc = clk_register_fixed_rate(NULL, "osc", NULL, CLK_IS_ROOT, - *osc_freq); + osc = clk_register_fixed_rate(NULL, "osc", NULL, 0, *osc_freq); dt_clk = tegra_lookup_dt_id(tegra_clk_clk_m, clks); if (!dt_clk) @@ -88,8 +87,7 @@ void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks) /* clk_32k */ dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks); if (dt_clk) { - clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, - CLK_IS_ROOT, 32768); + clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, 0, 32768); *dt_clk = clk; } |
