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| author | Stephen Boyd <sboyd@codeaurora.org> | 2017-03-23 16:08:46 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-03-23 16:08:46 -0700 |
| commit | 7f0b97d5bb4c1c99c38dd6770ad11f714ea42583 (patch) | |
| tree | ef993e4555f983dc35e282b2b2d949a1ebd42a2a /drivers/clk/sunxi-ng/ccu_nkmp.c | |
| parent | f8ba2d68e54fbca340ad0fce97397291ba9637bc (diff) | |
| parent | b467e08a15563dede0d37d3233baa24fb97a7310 (diff) | |
| download | talos-op-linux-7f0b97d5bb4c1c99c38dd6770ad11f714ea42583.tar.gz talos-op-linux-7f0b97d5bb4c1c99c38dd6770ad11f714ea42583.zip | |
Merge tag 'sunxi-clk-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-fixes
Pull Allwinner clock fixes from Maxime Ripard:
A few fixes for a bunch of clocks on a few SoCs. The most important one is
probably one that fixes the NKMP clock frequency calculation and could end
up with clocking the CPU frequency to out of bounds rates.
* tag 'sunxi-clk-fixes-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
clk: sunxi-ng: fix recalc_rate formula of NKMP clocks
clk: sunxi-ng: Fix div/mult settings for osc12M on A64
clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock
clk: sunxi: ccu-sun5i needs nkmp
clk: sunxi-ng: mp: Adjust parent rate for pre-dividers
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu_nkmp.c')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu_nkmp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu_nkmp.c b/drivers/clk/sunxi-ng/ccu_nkmp.c index a2b40a000157..488055ed944f 100644 --- a/drivers/clk/sunxi-ng/ccu_nkmp.c +++ b/drivers/clk/sunxi-ng/ccu_nkmp.c @@ -107,7 +107,7 @@ static unsigned long ccu_nkmp_recalc_rate(struct clk_hw *hw, p = reg >> nkmp->p.shift; p &= (1 << nkmp->p.width) - 1; - return parent_rate * n * k >> p / m; + return (parent_rate * n * k >> p) / m; } static long ccu_nkmp_round_rate(struct clk_hw *hw, unsigned long rate, |
