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| author | Tomasz Figa <t.figa@samsung.com> | 2013-08-26 19:09:08 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-09-06 13:33:52 -0700 |
| commit | 4f7641f588dcc5f614a2dae18e614da7abd13604 (patch) | |
| tree | 2029f28632cad4fa0a9569562c04b52203432475 /drivers/clk/clk-fixed-factor.c | |
| parent | 5c89658a2ef38bace96cf9d4474d59a32d06609d (diff) | |
| download | talos-op-linux-4f7641f588dcc5f614a2dae18e614da7abd13604.tar.gz talos-op-linux-4f7641f588dcc5f614a2dae18e614da7abd13604.zip | |
clk: samsung: exynos4: Reorder registration of mout_vpllsrc
Since PLL input frequency must be known before PLL registration,
mout_vpllsrc clock which is a reference clock of VPLL must be registered
before VPLL.
This patch reorders clock registration to register mout_vpllsrc before
VPLL.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk-fixed-factor.c')
0 files changed, 0 insertions, 0 deletions
