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author | Jon Medhurst <tixy@yxit.co.uk> | 2011-07-07 10:21:40 +0100 |
---|---|---|
committer | Tixy <tixy@medhuaa1.miniserver.com> | 2011-07-13 17:32:41 +0000 |
commit | 6c8df3300f60cae54aeb2a6dda8efe7ffe16a322 (patch) | |
tree | c7cac1abd0d5a46db1a4b4b3785238874822218b /arch | |
parent | 1b59d874660be7f790861ad849858cc009089515 (diff) | |
download | talos-op-linux-6c8df3300f60cae54aeb2a6dda8efe7ffe16a322.tar.gz talos-op-linux-6c8df3300f60cae54aeb2a6dda8efe7ffe16a322.zip |
ARM: kprobes: Move find_str_pc_offset into kprobes-common.c
Move str_pc_offset into kprobes-common.c as it will be needed by common
code later.
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/kernel/kprobes-arm.c | 28 | ||||
-rw-r--r-- | arch/arm/kernel/kprobes-common.c | 33 | ||||
-rw-r--r-- | arch/arm/kernel/kprobes.h | 2 |
3 files changed, 35 insertions, 28 deletions
diff --git a/arch/arm/kernel/kprobes-arm.c b/arch/arm/kernel/kprobes-arm.c index 3c4678edcbf8..0262b29163d1 100644 --- a/arch/arm/kernel/kprobes-arm.c +++ b/arch/arm/kernel/kprobes-arm.c @@ -92,29 +92,6 @@ union reg_pair { }; /* - * For STR and STM instructions, an ARM core may choose to use either - * a +8 or a +12 displacement from the current instruction's address. - * Whichever value is chosen for a given core, it must be the same for - * both instructions and may not change. This function measures it. - */ - -static int str_pc_offset; - -static void __init find_str_pc_offset(void) -{ - int addr, scratch, ret; - - __asm__ ( - "sub %[ret], pc, #4 \n\t" - "str pc, %[addr] \n\t" - "ldr %[scr], %[addr] \n\t" - "sub %[ret], %[scr], %[ret] \n\t" - : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr)); - - str_pc_offset = ret; -} - -/* * The insnslot_?arg_r[w]flags() functions below are to keep the * msr -> *fn -> mrs instruction sequences indivisible so that * the state of the CPSR flags aren't inadvertently modified @@ -1569,8 +1546,3 @@ arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) return space_cccc_11xx(insn, asi); } - -void __init arm_kprobe_decode_init(void) -{ - find_str_pc_offset(); -} diff --git a/arch/arm/kernel/kprobes-common.c b/arch/arm/kernel/kprobes-common.c index 794827ec27d7..e18576cca6cf 100644 --- a/arch/arm/kernel/kprobes-common.c +++ b/arch/arm/kernel/kprobes-common.c @@ -3,6 +3,9 @@ * * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>. * + * Some contents moved here from arch/arm/include/asm/kprobes-arm.c which is + * Copyright (C) 2006, 2007 Motorola Inc. + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. @@ -14,6 +17,36 @@ #include "kprobes.h" +/* + * For STR and STM instructions, an ARM core may choose to use either + * a +8 or a +12 displacement from the current instruction's address. + * Whichever value is chosen for a given core, it must be the same for + * both instructions and may not change. This function measures it. + */ + +int str_pc_offset; + +void __init find_str_pc_offset(void) +{ + int addr, scratch, ret; + + __asm__ ( + "sub %[ret], pc, #4 \n\t" + "str pc, %[addr] \n\t" + "ldr %[scr], %[addr] \n\t" + "sub %[ret], %[scr], %[ret] \n\t" + : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr)); + + str_pc_offset = ret; +} + + +void __init arm_kprobe_decode_init(void) +{ + find_str_pc_offset(); +} + + static unsigned long __kprobes __check_eq(unsigned long cpsr) { return cpsr & PSR_Z_BIT; diff --git a/arch/arm/kernel/kprobes.h b/arch/arm/kernel/kprobes.h index 4de2f37b1a85..43f630d7f03d 100644 --- a/arch/arm/kernel/kprobes.h +++ b/arch/arm/kernel/kprobes.h @@ -36,6 +36,8 @@ void __init arm_kprobe_decode_init(void); extern kprobe_check_cc * const kprobe_condition_checks[16]; +extern int str_pc_offset; + /* * Test if load/store instructions writeback the address register. * if P (bit 24) == 0 or W (bit 21) == 1 |