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| author | H. Peter Anvin <hpa@zytor.com> | 2012-04-06 09:30:57 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2012-04-06 09:40:07 -0700 |
| commit | 8c91c5325e107ec17e40a59a47c6517387d64eb7 (patch) | |
| tree | 095c65f98c2496dc9264d3b57fd36b20143d28e3 /arch/x86 | |
| parent | 2ca052a3710fac208eee690faefdeb8bbd4586a1 (diff) | |
| download | talos-op-linux-8c91c5325e107ec17e40a59a47c6517387d64eb7.tar.gz talos-op-linux-8c91c5325e107ec17e40a59a47c6517387d64eb7.zip | |
x86: Use correct byte-sized register constraint in __add()
Similar to:
2ca052a x86: Use correct byte-sized register constraint in __xchg_op()
... the __add() macro also needs to use a "q" constraint in the
byte-sized case, lest we try to generate an illegal register.
Link: http://lkml.kernel.org/r/4F7A3315.501@goop.org
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Cc: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: Leigh Scott <leigh123linux@googlemail.com>
Cc: Thomas Reitmayr <treitmayr@devbase.at>
Cc: <stable@vger.kernel.org> v3.3
Diffstat (limited to 'arch/x86')
| -rw-r--r-- | arch/x86/include/asm/cmpxchg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/cmpxchg.h b/arch/x86/include/asm/cmpxchg.h index bc18d0ed459a..99480e55973d 100644 --- a/arch/x86/include/asm/cmpxchg.h +++ b/arch/x86/include/asm/cmpxchg.h @@ -173,7 +173,7 @@ extern void __add_wrong_size(void) switch (sizeof(*(ptr))) { \ case __X86_CASE_B: \ asm volatile (lock "addb %b1, %0\n" \ - : "+m" (*(ptr)) : "ri" (inc) \ + : "+m" (*(ptr)) : "qi" (inc) \ : "memory", "cc"); \ break; \ case __X86_CASE_W: \ |
