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author | Luwei Kang <luwei.kang@intel.com> | 2018-10-24 16:05:16 +0800 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2018-12-21 11:28:38 +0100 |
commit | ee85dec2fe9c860c40f6e2e1d53052b80f36cd58 (patch) | |
tree | 258f4fa0826c514cd48574ae5325455fd81695db /arch/x86/kvm/vmx/nested.c | |
parent | b08c28960f254bd246af8e30a468dfc7dd56e03b (diff) | |
download | talos-op-linux-ee85dec2fe9c860c40f6e2e1d53052b80f36cd58.tar.gz talos-op-linux-ee85dec2fe9c860c40f6e2e1d53052b80f36cd58.zip |
KVM: x86: Disable Intel PT when VMXON in L1 guest
Currently, Intel Processor Trace do not support tracing in L1 guest
VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM,
on these type of processors, execution of the VMXON instruction will
clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL
causes a general-protection exception (#GP).
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/kvm/vmx/nested.c')
-rw-r--r-- | arch/x86/kvm/vmx/nested.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c index adc8493132ee..d839864aa8b0 100644 --- a/arch/x86/kvm/vmx/nested.c +++ b/arch/x86/kvm/vmx/nested.c @@ -4167,6 +4167,12 @@ static int enter_vmx_operation(struct kvm_vcpu *vcpu) vmx->nested.vmcs02_initialized = false; vmx->nested.vmxon = true; + + if (pt_mode == PT_MODE_HOST_GUEST) { + vmx->pt_desc.guest.ctl = 0; + pt_update_intercept_for_msr(vmx); + } + return 0; out_shadow_vmcs: |