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authorDavid Daney <ddaney@caviumnetworks.com>2010-10-07 16:03:40 -0700
committerRalf Baechle <ralf@linux-mips.org>2010-10-29 19:08:33 +0100
commitaa32a955ae46d4117e880417c89a2efcc88579c2 (patch)
tree538f1564b70d017b224a423d99bc2a0366c1f745 /arch/x86/kvm/i8254.c
parentb93b2abce497873be97d765b848e0a955d29f200 (diff)
downloadtalos-op-linux-aa32a955ae46d4117e880417c89a2efcc88579c2.tar.gz
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MIPS: Octeon: Update register definitions for CN63XX chips
The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores. Join some lines back together. This makes some of them exceed 80 columns, but they are uninteresting and this unclutters things. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1668/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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