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authorPeter Zijlstra <a.p.zijlstra@chello.nl>2010-03-03 12:02:30 +0100
committerIngo Molnar <mingo@elte.hu>2010-03-10 13:23:32 +0100
commitcaff2befffe899e63df5cc760b7ed01cfd902685 (patch)
treefe07f997bd67d1e5ae3122db789d7e7361ddca28 /arch/x86/include
parent69fef0d2e2c2c049ef4207a52e78b50d527bd85a (diff)
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perf, x86: Implement simple LBR support
Implement simple suport Intel Last-Branch-Record, it supports all hardware that implements FREEZE_LBRS_ON_PMI, but does not (yet) implement the LBR config register. The Intel LBR is a FIFO of From,To addresses describing the last few branches the hardware took. This patch does not add perf interface to the LBR, but merely provides an interface for internal use. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Arnaldo Carvalho de Melo <acme@infradead.org> Cc: paulus@samba.org Cc: eranian@google.com Cc: robert.richter@amd.com Cc: fweisbec@gmail.com LKML-Reference: <20100304140100.544191154@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include')
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