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| author | Stephane Eranian <eranian@google.com> | 2012-02-09 23:20:52 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2012-03-05 14:55:39 +0100 |
| commit | 225ce53910edc3c2322b1e4f2ed049a9196cd0b3 (patch) | |
| tree | add1a7795fd5120d17cef078e1d457199e5e3608 /arch/x86/include/asm/msr-index.h | |
| parent | bce38cd53e5ddba9cb6d708c4ef3d04a4016ec7e (diff) | |
| download | talos-op-linux-225ce53910edc3c2322b1e4f2ed049a9196cd0b3.tar.gz talos-op-linux-225ce53910edc3c2322b1e4f2ed049a9196cd0b3.zip | |
perf/x86: Add Intel LBR MSR definitions
This patch adds the LBR definitions for NHM/WSM/SNB and Core.
It also adds the definitions for the architected LBR MSR:
LBR_SELECT, LBRT_TOS.
Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1328826068-11713-3-git-send-email-eranian@google.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index a6962d9161a0..ccb805966f68 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -56,6 +56,13 @@ #define MSR_OFFCORE_RSP_0 0x000001a6 #define MSR_OFFCORE_RSP_1 0x000001a7 +#define MSR_LBR_SELECT 0x000001c8 +#define MSR_LBR_TOS 0x000001c9 +#define MSR_LBR_NHM_FROM 0x00000680 +#define MSR_LBR_NHM_TO 0x000006c0 +#define MSR_LBR_CORE_FROM 0x00000040 +#define MSR_LBR_CORE_TO 0x00000060 + #define MSR_IA32_PEBS_ENABLE 0x000003f1 #define MSR_IA32_DS_AREA 0x00000600 #define MSR_IA32_PERF_CAPABILITIES 0x00000345 |
