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| author | Vineet Gupta <vgupta@synopsys.com> | 2015-08-03 18:27:56 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2015-08-04 09:26:30 +0530 |
| commit | 6de7abfbad1c6a45893a47a17c2ac91b551aa90d (patch) | |
| tree | 11d53df8337ba1f498dcfb4d08a10c41d5e638ed /arch/sh/boards | |
| parent | e13c42ecbe580509451e021ba2586871e5b47640 (diff) | |
| download | talos-op-linux-6de7abfbad1c6a45893a47a17c2ac91b551aa90d.tar.gz talos-op-linux-6de7abfbad1c6a45893a47a17c2ac91b551aa90d.zip | |
ARCv2: [axs103_smp] Reduce clk for Quad FPGA configs
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/sh/boards')
0 files changed, 0 insertions, 0 deletions
