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author | Arnd Bergmann <arnd@arndb.de> | 2011-07-28 15:25:46 +0000 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-07-28 15:25:46 +0000 |
commit | 6124a4e430b64d1577438c8648c59e996d02e73e (patch) | |
tree | 49cfafad785d1c9e403a5b0d755298b9af2c260f /arch/powerpc/platforms/85xx/p4080_ds.c | |
parent | 8e267f3da5f117d2f1316cf6ddf740f93f1c73aa (diff) | |
parent | 580975d7f48d7d047e22bb0f42adf7557801d8d4 (diff) | |
download | talos-op-linux-6124a4e430b64d1577438c8648c59e996d02e73e.tar.gz talos-op-linux-6124a4e430b64d1577438c8648c59e996d02e73e.zip |
Merge branch 'imx/dt' into next/dt
Diffstat (limited to 'arch/powerpc/platforms/85xx/p4080_ds.c')
-rw-r--r-- | arch/powerpc/platforms/85xx/p4080_ds.c | 38 |
1 files changed, 26 insertions, 12 deletions
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c index 84170460497b..d1b21d7663e3 100644 --- a/arch/powerpc/platforms/85xx/p4080_ds.c +++ b/arch/powerpc/platforms/85xx/p4080_ds.c @@ -29,31 +29,42 @@ #include <linux/of_platform.h> #include <sysdev/fsl_soc.h> #include <sysdev/fsl_pci.h> +#include <asm/ehv_pic.h> #include "corenet_ds.h" -#ifdef CONFIG_PCI -static int primary_phb_addr; -#endif - /* * Called very early, device-tree isn't unflattened */ static int __init p4080_ds_probe(void) { unsigned long root = of_get_flat_dt_root(); +#ifdef CONFIG_SMP + extern struct smp_ops_t smp_85xx_ops; +#endif - if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) { -#ifdef CONFIG_PCI - /* treat PCIe1 as primary, - * shouldn't matter as we have no ISA on the board - */ - primary_phb_addr = 0x0000; + if (of_flat_dt_is_compatible(root, "fsl,P4080DS")) + return 1; + + /* Check if we're running under the Freescale hypervisor */ + if (of_flat_dt_is_compatible(root, "fsl,P4080DS-hv")) { + ppc_md.init_IRQ = ehv_pic_init; + ppc_md.get_irq = ehv_pic_get_irq; + ppc_md.restart = fsl_hv_restart; + ppc_md.power_off = fsl_hv_halt; + ppc_md.halt = fsl_hv_halt; +#ifdef CONFIG_SMP + /* + * Disable the timebase sync operations because we can't write + * to the timebase registers under the hypervisor. + */ + smp_85xx_ops.give_timebase = NULL; + smp_85xx_ops.take_timebase = NULL; #endif return 1; - } else { - return 0; } + + return 0; } define_machine(p4080_ds) { @@ -68,7 +79,10 @@ define_machine(p4080_ds) { .restart = fsl_rstcr_restart, .calibrate_decr = generic_calibrate_decr, .progress = udbg_progress, + .power_save = e500_idle, }; machine_device_initcall(p4080_ds, corenet_ds_publish_devices); +#ifdef CONFIG_SWIOTLB machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier); +#endif |