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| author | Florian Fainelli <f.fainelli@gmail.com> | 2015-04-07 13:34:02 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-08 23:52:33 +0200 |
| commit | 3cf29543413207d3ab1c3f62a88c09bb46f2264e (patch) | |
| tree | 98a700368de3560d5fe4abc0407f2eb6c31110ac /arch/mips | |
| parent | 68ba7cb083300409eb92282417db4c179081ade3 (diff) | |
| download | talos-op-linux-3cf29543413207d3ab1c3f62a88c09bb46f2264e.tar.gz talos-op-linux-3cf29543413207d3ab1c3f62a88c09bb46f2264e.zip | |
MIPS: BCM63xx: Provide a plat_post_dma_flush hook
Broadcom BCM63xx DSL SoCs utilize BMIPS CPUs, and as such are required
to perform a read-ahead cache flush after a DMA transfer. Utilize
asm/bmips.h to provide a plat_post_dma_flush_hook, and
mach-generic/dma-coherence.h for everything else.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/9726/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/dma-coherence.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h b/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h new file mode 100644 index 000000000000..11d3b572b1b3 --- /dev/null +++ b/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h @@ -0,0 +1,10 @@ +#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H +#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H + +#include <asm/bmips.h> + +#define plat_post_dma_flush bmips_post_dma_flush + +#include <asm/mach-generic/dma-coherence.h> + +#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */ |
