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author | Fuxin Zhang <zhangfx@lemote.com> | 2007-06-06 14:52:43 +0800 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-07-10 17:33:02 +0100 |
commit | 2a21c7300b53b744d16903256a172d9cbcfdd03e (patch) | |
tree | 6a6f186fc7d4ab51fdda628a42f1fa845f189b8b /arch/mips/mm/tlbex.c | |
parent | fee578fad1a29e6a149659e5467aedcae6897c06 (diff) | |
download | talos-op-linux-2a21c7300b53b744d16903256a172d9cbcfdd03e.tar.gz talos-op-linux-2a21c7300b53b744d16903256a172d9cbcfdd03e.zip |
[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2
Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/tlbex.c')
-rw-r--r-- | arch/mips/mm/tlbex.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index e7149290d1cb..4ec0964b8394 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -893,6 +893,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, case CPU_4KSC: case CPU_20KC: case CPU_25KF: + case CPU_LOONGSON2: tlbw(p); break; @@ -1276,7 +1277,8 @@ static void __init build_r4000_tlb_refill_handler(void) * need three, with the second nop'ed and the third being * unused. */ -#ifdef CONFIG_32BIT + /* Loongson2 ebase is different than r4k, we have more space */ +#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) if ((p - tlb_handler) > 64) panic("TLB refill handler space exceeded"); #else @@ -1289,7 +1291,7 @@ static void __init build_r4000_tlb_refill_handler(void) /* * Now fold the handler in the TLB refill handler space. */ -#ifdef CONFIG_32BIT +#if defined(CONFIG_32BIT) || defined(CONFIG_CPU_LOONGSON2) f = final_handler; /* Simplest case, just copy the handler. */ copy_handler(relocs, labels, tlb_handler, p, f); @@ -1336,7 +1338,7 @@ static void __init build_r4000_tlb_refill_handler(void) final_len); f = final_handler; -#ifdef CONFIG_64BIT +#if defined(CONFIG_64BIT) && !defined(CONFIG_CPU_LOONGSON2) if (final_len > 32) final_len = 64; else |