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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-03-06 18:02:46 -0800 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-03-06 18:02:46 -0800 |
commit | 185d84b4e1f6febebbe30d785fe31310dcf9632a (patch) | |
tree | 95a8ece17e7f26b2f277ab45ac0145ce6636772f /arch/mips/mips-boards/malta/malta_smtc.c | |
parent | 03154a271012031ad6336dc3344679440ba49c24 (diff) | |
parent | 063ea774b021c70fa96139eb601f894aff8941c0 (diff) | |
download | talos-op-linux-185d84b4e1f6febebbe30d785fe31310dcf9632a.tar.gz talos-op-linux-185d84b4e1f6febebbe30d785fe31310dcf9632a.zip |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] IP27: Build fix
[MIPS] Wire up ioprio_set and ioprio_get.
[MIPS] Fix __raw_read_trylock() to allow multiple readers
[MIPS] Export __copy_user_inatomic.
[MIPS] R2 bitops compile fix for gcc < 4.0.
[MIPS] TX39: Remove redundant tx39_blast_icache() calls
[MIPS] Cobalt: Fix early printk
[MIPS] SMTC: De-obscure Malta hooks.
[MIPS] SMTC: Add fordward declarations for mm_struct and task_struct.
[MIPS] SMTC: <asm/mips_mt.h> must include <linux/cpumask.h>
[MIPS] SMTC: <asm/smtc_ipi.h> must include <linux/spinlock.h>
[MIPS] Atlas, Malta: Fix build warning.
Diffstat (limited to 'arch/mips/mips-boards/malta/malta_smtc.c')
-rw-r--r-- | arch/mips/mips-boards/malta/malta_smtc.c | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c new file mode 100644 index 000000000000..d1c80f631100 --- /dev/null +++ b/arch/mips/mips-boards/malta/malta_smtc.c @@ -0,0 +1,88 @@ +/* + * Malta Platform-specific hooks for SMP operation + */ +#include <linux/init.h> + +#include <asm/mipsregs.h> +#include <asm/mipsmtregs.h> +#include <asm/smtc.h> +#include <asm/smtc_ipi.h> + +/* VPE/SMP Prototype implements platform interfaces directly */ + +/* + * Cause the specified action to be performed on a targeted "CPU" + */ + +void core_send_ipi(int cpu, unsigned int action) +{ + /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */ + smtc_send_ipi(cpu, LINUX_SMP_IPI, action); +} + +/* + * Platform "CPU" startup hook + */ + +void prom_boot_secondary(int cpu, struct task_struct *idle) +{ + smtc_boot_secondary(cpu, idle); +} + +/* + * Post-config but pre-boot cleanup entry point + */ + +void prom_init_secondary(void) +{ + void smtc_init_secondary(void); + int myvpe; + + /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */ + myvpe = read_c0_tcbind() & TCBIND_CURVPE; + if (myvpe != 0) { + /* Ideally, this should be done only once per VPE, but... */ + clear_c0_status(STATUSF_IP2); + set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3 + | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 + | STATUSF_IP7); + } + + smtc_init_secondary(); +} + +/* + * Platform SMP pre-initialization + * + * As noted above, we can assume a single CPU for now + * but it may be multithreaded. + */ + +void plat_smp_setup(void) +{ + if (read_c0_config3() & (1<<2)) + mipsmt_build_cpu_map(0); +} + +void __init plat_prepare_cpus(unsigned int max_cpus) +{ + if (read_c0_config3() & (1<<2)) + mipsmt_prepare_cpus(); +} + +/* + * SMP initialization finalization entry point + */ + +void prom_smp_finish(void) +{ + smtc_smp_finish(); +} + +/* + * Hook for after all CPUs are online + */ + +void prom_cpus_done(void) +{ +} |