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authorWu Zhangjin <wuzhangjin@gmail.com>2009-07-02 23:26:08 +0800
committerRalf Baechle <ralf@linux-mips.org>2009-09-17 20:07:47 +0200
commit8e4971175acc910eb4258df82a6bd8f2c4e4e5b5 (patch)
tree921d53308d0a8a8e9119ec6b262a01fe0ccd1fd5 /arch/mips/loongson/fuloong-2e/early_printk.c
parent67b35e5d01aba7a83f2161b0c90acb08afa01e3e (diff)
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MIPS: Loongson: Change naming methods
To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson/fuloong-2e/early_printk.c')
-rw-r--r--arch/mips/loongson/fuloong-2e/early_printk.c39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/mips/loongson/fuloong-2e/early_printk.c b/arch/mips/loongson/fuloong-2e/early_printk.c
new file mode 100644
index 000000000000..3e0a6eaa4041
--- /dev/null
+++ b/arch/mips/loongson/fuloong-2e/early_printk.c
@@ -0,0 +1,39 @@
+/* early printk support
+ *
+ * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
+ * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ * Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/serial_reg.h>
+
+#include <loongson.h>
+
+#define UART_BASE (BONITO_PCIIO_BASE + 0x3f8)
+
+#define PORT(base, offset) (u8 *)(base + offset)
+
+static inline unsigned int serial_in(phys_addr_t base, int offset)
+{
+ return readb(PORT(base, offset));
+}
+
+static inline void serial_out(phys_addr_t base, int offset, int value)
+{
+ writeb(value, PORT(base, offset));
+}
+
+void prom_putchar(char c)
+{
+ phys_addr_t uart_base =
+ (phys_addr_t) ioremap_nocache(UART_BASE, 8);
+
+ while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0)
+ ;
+
+ serial_out(uart_base, UART_TX, c);
+}
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