diff options
| author | Jayachandran C <jchandra@broadcom.com> | 2013-08-21 19:31:29 +0530 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-09-03 23:22:18 +0200 |
| commit | a2ba6cd6e65bf96059632ed2fe48a7a0f5aea472 (patch) | |
| tree | e6a04a3eed22d430ebcb84b6f0d68164211b8bab /arch/mips/include/asm/netlogic/xlp-hal | |
| parent | 2c4f1ac5623750e715ae2a5fc7e0569999b9bfc5 (diff) | |
| download | talos-op-linux-a2ba6cd6e65bf96059632ed2fe48a7a0f5aea472.tar.gz talos-op-linux-a2ba6cd6e65bf96059632ed2fe48a7a0f5aea472.zip | |
MIPS: Netlogic: Read memory from DRAM BARs
Read the memory from the Bridge DRAM BARs, if it is not passed in
from the device tree. This will allow us to remove memory configuration
from built in device trees.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5743/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/netlogic/xlp-hal')
| -rw-r--r-- | arch/mips/include/asm/netlogic/xlp-hal/bridge.h | 4 | ||||
| -rw-r--r-- | arch/mips/include/asm/netlogic/xlp-hal/xlp.h | 3 |
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/include/asm/netlogic/xlp-hal/bridge.h b/arch/mips/include/asm/netlogic/xlp-hal/bridge.h index 790f0f1e55c6..4e8eacb9588a 100644 --- a/arch/mips/include/asm/netlogic/xlp-hal/bridge.h +++ b/arch/mips/include/asm/netlogic/xlp-hal/bridge.h @@ -88,6 +88,7 @@ #define BRIDGE_DRAM_LIMIT6 0x22 #define BRIDGE_DRAM_LIMIT7 0x23 +#define BRIDGE_DRAM_NODE_TRANSLN(i) (0x24 + (i)) #define BRIDGE_DRAM_NODE_TRANSLN0 0x24 #define BRIDGE_DRAM_NODE_TRANSLN1 0x25 #define BRIDGE_DRAM_NODE_TRANSLN2 0x26 @@ -96,6 +97,8 @@ #define BRIDGE_DRAM_NODE_TRANSLN5 0x29 #define BRIDGE_DRAM_NODE_TRANSLN6 0x2a #define BRIDGE_DRAM_NODE_TRANSLN7 0x2b + +#define BRIDGE_DRAM_CHNL_TRANSLN(i) (0x2c + (i)) #define BRIDGE_DRAM_CHNL_TRANSLN0 0x2c #define BRIDGE_DRAM_CHNL_TRANSLN1 0x2d #define BRIDGE_DRAM_CHNL_TRANSLN2 0x2e @@ -104,6 +107,7 @@ #define BRIDGE_DRAM_CHNL_TRANSLN5 0x31 #define BRIDGE_DRAM_CHNL_TRANSLN6 0x32 #define BRIDGE_DRAM_CHNL_TRANSLN7 0x33 + #define BRIDGE_PCIEMEM_BASE0 0x34 #define BRIDGE_PCIEMEM_BASE1 0x35 #define BRIDGE_PCIEMEM_BASE2 0x36 diff --git a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h index f4ea0f7f3965..d59cdd69496b 100644 --- a/arch/mips/include/asm/netlogic/xlp-hal/xlp.h +++ b/arch/mips/include/asm/netlogic/xlp-hal/xlp.h @@ -59,6 +59,9 @@ void xlp_wakeup_secondary_cpus(void); void xlp_mmu_init(void); void nlm_hal_init(void); +int xlp_get_dram_map(int n, uint64_t *dram_map); + +/* Device tree related */ void *xlp_dt_init(void *fdtp); #endif /* !__ASSEMBLY__ */ |
