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author | Paul Burton <paul.burton@mips.com> | 2018-11-08 20:14:38 +0000 |
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committer | Paul Burton <paul.burton@mips.com> | 2018-11-09 10:23:19 -0800 |
commit | 378ed6f0e3c525e3b12827e7b7fb0a078ee48a32 (patch) | |
tree | 766bb2bdd18f7aa7fce8a9ccb428cfcad8cf2feb /arch/mips/include/asm/futex.h | |
parent | 183b40f992c8f98082c4d72043ecdeba0e6a4367 (diff) | |
download | talos-op-linux-378ed6f0e3c525e3b12827e7b7fb0a078ee48a32.tar.gz talos-op-linux-378ed6f0e3c525e3b12827e7b7fb0a078ee48a32.zip |
MIPS: Avoid using .set mips0 to restore ISA
We currently have 2 commonly used methods for switching ISA within
assembly code, then restoring the original ISA.
1) Using a pair of .set push & .set pop directives. For example:
.set push
.set mips32r2
<some_insn>
.set pop
2) Using .set mips0 to restore the ISA originally specified on the
command line. For example:
.set mips32r2
<some_insn>
.set mips0
Unfortunately method 2 does not work with nanoMIPS toolchains, where the
assembler rejects the .set mips0 directive like so:
Error: cannot change ISA from nanoMIPS to mips0
In preparation for supporting nanoMIPS builds, switch all instances of
method 2 in generic non-platform-specific code to use push & pop as in
method 1 instead. The .set push & .set pop is arguably cleaner anyway,
and if nothing else it's good to consistently use one method.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21037/
Cc: linux-mips@linux-mips.org
Diffstat (limited to 'arch/mips/include/asm/futex.h')
-rw-r--r-- | arch/mips/include/asm/futex.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h index a9e61ea54ca9..8eff134b3a43 100644 --- a/arch/mips/include/asm/futex.h +++ b/arch/mips/include/asm/futex.h @@ -24,9 +24,10 @@ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set arch=r4000 \n" \ "1: ll %1, %4 # __futex_atomic_op \n" \ - " .set mips0 \n" \ + " .set pop \n" \ " " insn " \n" \ " .set arch=r4000 \n" \ "2: sc $1, %2 \n" \ @@ -35,7 +36,6 @@ "3: \n" \ " .insn \n" \ " .set pop \n" \ - " .set mips0 \n" \ " .section .fixup,\"ax\" \n" \ "4: li %0, %6 \n" \ " j 3b \n" \ @@ -53,9 +53,10 @@ __asm__ __volatile__( \ " .set push \n" \ " .set noat \n" \ + " .set push \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \ - " .set mips0 \n" \ + " .set pop \n" \ " " insn " \n" \ " .set "MIPS_ISA_ARCH_LEVEL" \n" \ "2: "user_sc("$1", "%2")" \n" \ @@ -64,7 +65,6 @@ "3: \n" \ " .insn \n" \ " .set pop \n" \ - " .set mips0 \n" \ " .section .fixup,\"ax\" \n" \ "4: li %0, %6 \n" \ " j 3b \n" \ @@ -137,10 +137,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "# futex_atomic_cmpxchg_inatomic \n" " .set push \n" " .set noat \n" + " .set push \n" " .set arch=r4000 \n" "1: ll %1, %3 \n" " bne %1, %z4, 3f \n" - " .set mips0 \n" + " .set pop \n" " move $1, %z5 \n" " .set arch=r4000 \n" "2: sc $1, %2 \n" @@ -166,10 +167,11 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, "# futex_atomic_cmpxchg_inatomic \n" " .set push \n" " .set noat \n" + " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "1: "user_ll("%1", "%3")" \n" " bne %1, %z4, 3f \n" - " .set mips0 \n" + " .set pop \n" " move $1, %z5 \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" "2: "user_sc("$1", "%2")" \n" |