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| author | Mike Frysinger <vapier.adi@gmail.com> | 2008-11-18 17:48:22 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-11-18 17:48:22 +0800 |
| commit | b7e11293a4340dc20674144f7e83883a7a40049e (patch) | |
| tree | 71e3cd327d8da0ff5cdd8592d6125a7b84559071 /arch/blackfin/mach-common | |
| parent | 94b28211d83a7d8e86a8452a1bc65c95853af448 (diff) | |
| download | talos-op-linux-b7e11293a4340dc20674144f7e83883a7a40049e.tar.gz talos-op-linux-b7e11293a4340dc20674144f7e83883a7a40049e.zip | |
Blackfin arch: fix bug - reboot fails on BF527
add ANOMALY_05000435 to handle SIC_IWR1 workaround for rebooting
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common')
| -rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 5 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/pm.c | 5 |
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 5a7c1c177d23..f7e35e7965fc 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1069,7 +1069,10 @@ int __init init_arch_irq(void) * up from IDLE instructions. See this report for more info: * http://blackfin.uclinux.org/gf/tracker/4323 */ - bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); + if (ANOMALY_05000435) + bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); + else + bfin_write_SIC_IWR1(IWR_DISABLE_ALL); #else bfin_write_SIC_IWR1(IWR_DISABLE_ALL); #endif diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index ee33a8a988bd..96600b8cb6ad 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c @@ -91,7 +91,10 @@ void bfin_pm_suspend_standby_enter(void) * up from IDLE instructions. See this report for more info: * http://blackfin.uclinux.org/gf/tracker/4323 */ - bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); + if (ANOMALY_05000435) + bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); + else + bfin_write_SIC_IWR1(IWR_DISABLE_ALL); #else bfin_write_SIC_IWR1(IWR_DISABLE_ALL); #endif |
